Bright Peaks for Smaller Chips

Salden writes "University of Wisconsin scientists propose a way to create 20nm chip features. They were investigating the limits of X-ray lithography and discovered that they could control the phase of X-rays by adjusting the gap between a mask and wafer. Pretty cool."

Comments

Re:Its not just the drawn length that matters

[Anonymous Coward]

you must be talking about high-Vt transistors. because operating speed is crucial, most state-of-the-art transistors have Vts around .3-.4 V.

the smaller transistors will definitely lead to other problems for analog circuits. First of all, short-channel noise increases with maximum voltage decreasing, making it harder to achieve low noise figures.

What's next?

[Longjmp]

What I'd be really interested in is what will be next in chip design. At one point traditionally designed chips will be at a single (or a few atoms per transistor) and shielding from natural radiation will be an issue, just as an example.

Even if this wouldn't be an issue (I'm no expert,) there will be a physical limit.

It seems that new designs are overdue. Quantum computers maybe?

Re:Been done already

[waferbuster]

Phase shift masking techniques have been in use for several years, and involve changing the transmissive properties of the reticle/mask material so as to shift the phase of light passing through select portions of the reticle relative to the clear areas. This process is done purely through mask design.

The article involves a totally different concept, in which they are controlling the mask-to-wafer distance so as to control the phase of the light hitting the photoresist. Control of that mask to wafer distance in current technology is not rigidly controlled. It's considered fine to have the reticle in the same rough focal plane as the wafer, but not controlled tightly enough to keep phase polarity intact throughout the exposure field.

It's an interesting technology demonstration, but I'm not convinced that it's adaptable to a manufacturing environment due to the amount of flatness variation on a local exposure field. Wafers may look flat, but on the transistor gate level, it's very lumpy. Sure, some areas of the field will be in phase, but other areas won't be in the correct phase spoiling the chances of getting a working circuit.

It's easy to get a single transistor scaled to incredibly small sizes. It's another matter entirely to get an entire exposure field of consistently small devices, all of which work.

Interesting article...