Slashdot Mirror
AMD Opteron Due In April
updog writes "Here's an article from Infoworld claiming that the new 64-bit AMD Opteron is ready to launch on April 22. Some of the notable features of the new chip are an address space capable of addressing up to 1 Terabyte of memory, the ability to link up to 8 processors without any external chips, and backwards compatibility with existing 32-bit applications ..." PapaFSmurf, meanwhile, links to a disclaimer-heavy article posted at amdboard.com which says that 64-bit Athlons may arrive in June rather than September as previously expected.
Imagine how fast THE INTERNET is gonna be now!
TWICE as fast, at least!
If moderation could change anything, it would be illegal.
Barton isn't enough to keep AMD going against Intel until Sept. Simply not gonna happen, and I think they have seen that coming and are trying to head it off by launching the Athlon64 closer to its originally planned release.
Once the Athlon64 is available and people are building systems using it, AMD just stole back the "King of PC processors" title and in a BIG way.
Natural != (nontoxic || beneficial)
Affordable x86 64-bit servers for the masses, this is going to revitalize AMD and really put it on the map as a serious challenger to Intel. I hope Chipzilla wakes up and sees that its incredibly expensive and backwards-incompatible Itanic 2 chips are the result of engineers developing for themselves instead of developing for the needs of their customers. Finally, AMD will be able to court the high profit business market, though I fear that they might alienate their hardcore enthusiast consumers in the process...
AMD's enchanted April
AMD's 64-bit alternative
By Tom Yager March 14, 2003
After years of hype, the AMD Opteron 64-bit processor will debut in April. The company and its shareholders might curse the rotten timing, but the current contracted market is actually the perfect setting for AMD's new technology. While other chipmakers scramble to adapt, AMD seems to have designed current business challenges and priorities into its architecture. Considering how long Opteron has been in engineering, AMD is either very smart or very lucky. Opteron may be an opportune solution for customers looking to consolidate their servers and reduce operating costs.
The advantages of AMD's new design are many. The most talked-about feature is the CPU's support for 64-bit applications. Unlike previous 64-bit processors, Opteron implements the full x86-32 instruction set. Software that runs on a Pentium III or AMD Athlon now will run unmodified on Opteron. Opteron-based servers will likely spend the majority of their time running the 32-bit Windows and Linux programs that businesses use today.
Software written to exploit Opteron's 64-bit capabilities will break through the barriers that prevent the x86 from running extremely demanding server and technical applications. A vastly expanded address space (up to 1TB of physical memory), a larger set of high-speed registers, and new instructions will take affordable servers to a higher level of performance. Running in 64-bit mode, an Opteron application can crunch through mountains of in-memory data and perform blazingly fast data transfers to network and storage devices.
Unlike other x86 processors, the Opteron CPU has the inherent ability to link up to eight processors without specialized chips. Every processor has three HyperTransport bus controllers for fast connections to other CPUs and devices. Instead of using an external memory controller, which complicates system design and adds latency, AMD links memory directly to each CPU. The design has plenty of headroom to accommodate faster memory and I/O devices. The only speed limit is the 19.2GB per second capacity of each chip's combined HyperTransport channels, which exceeds the top speed of the most capable PC server bus.
In systems that require more than eight processors, Opteron will rely on external chipsets to provide communications between CPUs. The fact that HyperTransport is already on the chip simplifies the engineering. Systems running two- and four-CPU configurations -- which account for most x86 server sales -- will ship in 2003. How soon larger systems appear depends entirely on market demand.
Answering critics
The chief criticisms leveled against the platform by Intel and critical analysts -- mainly that Opteron is immature technology and that Microsoft is dragging its feet porting Windows to it -- will prove groundless. The well-respected and thoroughly debugged Athlon x86 processor is the foundation of the Opteron chip. The remarkable HyperTransport bus that AMD uses to tie Opteron chips to each other and to I/O devices is already in widespread use. The DDR (double data rate) memory that AMD has chosen for its first implementation is inexpensive and readily available. AMD's chipset implements standard PCI-X and AGP ( Accelerated Graphics Port ) peripheral buses. System manufacturers and customers will have relatively few adjustments to make.
The Windows question is slightly trickier, but it isn't an issue Intel should press too hard. Yes, the sole 64-bit version of Windows runs on Itanium and Itanium 2. However, Microsoft has repeatedly stated that it strongly prefers AMD's 64-bit architecture to Intel's. Opteron is not stuck in the same spot as Intel at the launch of Itanium. Intel had to wait for Microsoft to announce its Itanium-specific port of Windows . Opteron already runs 32-bit Windows at full speed, while other 64-bit CPUs must use emulation to run most Windows software. Microsoft's engineering task, which it needn't hurry to accomplish, is to
Duron? Opteron? Who comes up with these? They sound like types of rubber, or possibly fuel additives...
Actually, more people than you'd think. Most modern processors are limited to a 4 GB address space and one has to "hack" around this limitation to achieve larger spaces. The reason why I say more people than you'd think is that the 1 TB space would allow one to map any location on the largest hard drives available today to a virtual memory location. There would be a *tremendous* performance boost in doing this as opposed to other contemporary file management schemes.
The only thing the article references is that Newisys is leading the charge, but I don't see anything I would consider a source. Racksaver is claiming that evaluation units are available now, but mostly there's just a lot of Opteron Server Evaluation signups. Does anyone have any real information? Cost? Non-evaluation release? Anything?
No, I ma not making a joke. Yesterday, Friday March 15 2003 I bought my new Soyo KT400 Dragon motherboard and a AMD 2600 Athlon with 333 bus. I have been cutting edge for 24 hours.
I never will win.
On a more positive note, any body know of motherboards for these monsters yet?
Great people don't need people to complete them, great people complete other people. -- Matthew Pawlikowski.
The release date of April 22 was released a long time ago
(ie: January 21, 2003, just incase you didn't get the picture)
To make a pun demonstrates the highest understanding of a language
The big question is whether or not Palladium will be built into this chip. Anyone know?
The Opteron is being launched on the 22nd of April. It was code named Sledgehammer, and is what Newisys and others are using. It is the server version of Hammer.
Athlon 64 is coming out in September. It is the desktop and mobile version of Hammer that was codenamed Clawhammer.
ignorance is bliss. googlefiberatx.com
The width of the machine is not the number of threads it's able to run at a given time (SMT like P4), but the number of instructions you can execute in a cycle (in a parallel fashion, of course). The difference between x86 and Itanium is that on Itanium the instructions are "explicitly parallel", i.e. the compiler bundles instructions together and the processor knows it can execute them in parallel, while on x86 the processor is smarter and determines itself which
micro-ops (actually it's rops for AMD) it can execute in parallel.
You're very likely going to see speedups on 32 bit code, simply because Opteron is twice as wide as P4 (and this has nothing to do with the size of the operands, which probably is not going to matter as much).
As far as the 64 apps are concerned - Linux already runs on it.
The Raven
here
and Athlon64 boards here
If you use a source-based distribution, like Gentoo, everything in your system will be compiled for your 64-bit architecture when it's installed. You'll be able to take advantage of your new 64-bit architecture right from the get-go.
Windows is still going to use the swap file.
There are previous posts repeating this, but there's one problem with the theory: That taking advantage of the 64-bit architecture from the get-go will actually give a speed benefit. It also assumes that all of the source code is '64-bit clean', although that is likely not going to be much of a problem.
The problem is that, sure, everything is compiled into 64-bit mode. Fine. But can the compiler optimize the 64-bit code as well as it can optimize the older 32-bit code? Will the compiler make good use of the extra registers? I'm willing to bet that, for the first while, 64-bit AMD compilers will generate slower code than their 32-bit counterpart. (For 99% of all applications -- those which do NOT need more than 2 GB of memory).
And, of course, there is my major question: What kind of context switch and/or process latency can we expect from the Athlon64 & Opteron? I realize nearly all hard real-time apps don't need anything this powerful-- most good engineers will just put a microcontroller in to handle the hard real-time, and buffer things enough so that it doesn't matter that the workstation isn't hard real-time; but it does have a serious impact on other aspects of system responsiveness, as well as overall system performance for a microkernel architecture (such as HURD, Darwin, or QNX).
For that matter-- how will the Opteron's context switch time compare to other 'server' processors, like the UltraSparc, POWER4, Itanium, and, for good measure, PowerPC? Most of the arguments I've seen about modern x86 having a horrible context switch time don't seem to hold up to benchmarks I've seen-- where identically-clocked PowerPC and Pentiums take nearly the same time (and hence nearly the same number of clock cycles) to context switch...
-- Sometimes you have to turn the lights off in order to see.
Depends.
Linux has been running on 64-bit architectures for some time now, so 64-bit'ness isn't a new thing. And with distros like Debian that support everything from m68k up to Alpha a large portion of the issues have been taken care of already. Debian 'sarge' currently has 10058 packages, all of which compile and run (I'm not going to say all are 64-bit bug free, that would be stupid).
And also most Open Source apps are used on Solaris, Tru64, HP-UX, etc which are 64-bit. Windows may have a big transition ahead of it, but for the rest of us it'll be just like any other motherboard upgrade =)
No, the ceiling is not stupid.
Limiting the physical memory to 40 bits reduces the cost of building other system components, such as chipsets and motherboards, dramatically. Further, 1TB of RAM is sufficient for the current market. That is 1000 1GB parts, to give it some perspective.
As customers begin to approach 1TB requirements, AMD only has to implement more lines. No need for any segmentation hacks. The ISA needs no modification. This is a pragmatic and wise design decision.
64 bits of address space is still very useful without having actual RAM to back it up. It means you can map large quantities of storage into RAM directly. For example; if you have 10TB of disk, you can map all of it into a single virtual address space and address it with simple offsets. Obviously this is useful for large databases.
Maw! Fire up the karma burner!
Cost.
These chips (for the first few years *at least*) will be low end or mid range small servers. Small in that they won't be competing with Sun Fire 15K servers which themselves only support physical memory of up to 576GB. No one will need those extra 24 memory address lines, so why build chips or motherboards with them?
Another way of looking at it is real-estate.
Currently 1GB dimms are the normal upper end, with a few 2GB dimms around.
At that rate, can you imagine the motherboard that could actually reach the 1TB RAM limit? 512 or 1024 dimm slots?....
Would that fit into the ATX form factor?
Manufacturing ICs is not an exact science. Very small impurities can render a die, or a part of a die unusable. The manufacturer can either throw these away, or disable the broken part and sell it as a crippled version. Intel's Celerons were just the P2/3s that had failed part of the cache tests. A lot of the difference between the Athlon64 and Opteron is cache size. A second is SMP support. The Opteron has 3 HyperTransport controllers on die that allow it to communicate with other CPUs with no 'glue' architecture. The Athlon64 will only have one, so any Opterons which have one defective HT controller can be sold as 2-way SMP parts, and those with 2 defective HT controllers will be Athlon64s (those with 23 defective HT controllers will be marketed as paperweights).
AMD has only developed a single CPU, and it will only manufacture a single CPU. It will market this as the most expensive Opteron. All the other versions are simply failed versions of this, with the broken parts disabled.
As an aside, you actually could enable the other half of the cache on some Celerons by mutilating the CPU a little. It was a particularly bad idea, since errors in cache tend to make your system rather unstable, but it could be done...
I am TheRaven on Soylent News
Blockquoth the poster:
Your caution in this is reasonable, but don't forget that the GNU community is using GCC, which supports a gazillion of architectures, so:
So I would expect that the code GCC produces for x86-64 will be comparable to that produced for i386, and probably faster from the beginning, because of the extra registers. The extra size might affect some cache critical programs, but with the default integer size still being 32 bit, I wouldn't worry too much about that.
Vasilis Vasaitis
Late readers: please moderate at Newest First, with a low threshold, to promote late writers.
I compiled everything from source for my Alpha, not one problem with 64-bit cleanliness. That was a problem in the early 90s. There are enough 64-bit chips around now, that every serious application has been compiled on one at some time.
GCC is already ready for the Hammer chips. If compiling for x86-64 you get code generated that can make use of mmx, mmxext, 3dnow, 3dnowext, sse, and sse2. It actually prefers those instructions over the old x87 functions by default.
I've heard that the Hammer is 2.5 times faster per clock than the lastest Athlons in 32-bit mode, and faster still in 64.
I WILL be building a machine around 2 of these chips as soon as the first Tyan board ships with PCI-X slots.
Its going to be really sad how quad motherboards are still going to cost at least $800, even though they've got to be downright trivial to make compared to modern quad system. No central switching logic, just interconnect buses between processors! PCB and sockets aint that expensive, there's really no excuse. But its going to happen anyways.
Speak nothing of the many-thousand dollar eight processor boards.
Damn cushy profit margins.
The Abit BP6 was my introduction to low cost SMP. Now I've got a craving for more, but I dont think its going to happen. Even thought it could.
Maybe someone will get smart and make a enthusiast board. I seriously doubt it though. Not when there's bigger fish to fry. How long is it going to take for someone to realize that although less profitable, there will be untapped demand for non-server class quad systems.
Myren
What makes the Opteron a server chip is the presense of three hypertransport links, the bus used for communication between multiple CPUs and other components such as the motherboard chipset. The Athlon64 will have only one. This is important since hypertransport, unlike say PCI, uses point-to-point links. The AGP and PCI bridges could be on separate hypertransport links and in theory we could see things like gigE controllers directly attached to the hypertransport bus.
Also, last I heard, the Opteron will use Dual DDR memory, while Athlon64 will have to make do with single-channel DDR. Recall that both Hammer chips (SledgeHammer, aka Opteron, and ClawHammer, aka Athlon64), have the memmory controller integrated onto the CPU.
For both of these reasons, the Opteron and Athlon64 sockets are incompatible (Socket 754 vs Socket 940). There's an old review with plenty of information here
Opteron is AMD's first real entry into the server market. AthlonMP was never truly meant for anything other than workstations or very low level entry servers. Itanium is Intel's offering for very strong, high performance servers. Their Xeon chip is the high-end workstation to mid-range server chip. All indications are that AMD will be targetting low to mid range servers with the Opteron.
Intel's point is that they don't believe anything other than high-end servers will use 64-bit chips effectively. AMD's point is that anyone can use whatever they like. A dual Opteron with 2MB L2 will most likely be targetted against dual Xeon machines. AMD will try to offer a better price point and the ability to run 64-bit applications to potential customers in their attempt to win partners. The launch of the Opteron had best go off MUCH better than the launch of the AthlonMP if AMD hopes to make it in the server business. Already weary of new products, big businesses will be looking for any excuse not to go with an Opteron. Even Intel has trouble convincing long-time customers to invest in new products, as evidenced by their dismal Itanium 1 launch. If the chipset and board problems we saw in the Tyan AthlonMPs creep up in any of the Opteron boards, AMD's cash cow will be seen in the business community as little more than the 'roo meat at McD's. That, potentially, could end up being the nail in AMD's coffin.
They have a lot riding on this launch, so let's all hope it goes off without a hitch. If it does, I think Xeon processors will be collecting dust within a year's time while Opterons slowly replace what's currently in the workplace. In very, very few circumstances will a company look at Opterons as an alternative for Itaniums. In terms of performance? Who knows; we haven't see benchmarks on production Opterons yet. If it's everything we're told it is, it may very well outperform the Itanium 2s vis-a-vis.
-- "Government is the great fiction through which everybody endeavors to live at the expense of everybody else."
The so-called "very low end server" market makes up 90% of all x86 servers sold. Most x86 based data centers, albiet Linux or Windows, use single or dual-processor servers in load-balanced clusters. Most of these servers run Pentium 3 processors.
These servers handle most of the workload, while a small few "high end x86" servers can handle database things. Sometimes, the database sits on non-x86 platforms.
The AthlonMP is a higher-performance alternative to the dual-Pentium 3 server/workstation, and can even perform well against a dual-xeon box.
It's hard to know where AMD is trying to position this processor, but it seems to me that the new processor core is positioned to compete with Intel on all fronts. Perhaps the processor will perform so well and be so much cheaper then the Itanium that it will bring very-high performance computing to places that could normally not afford it. We don't know; we'll have to wait and see.
- It's not the Macs I hate. It's Digg users. -