End of The Von Neumann Computing Age?
olafo writes "Three recent Forbes articles:
Chipping Away, Flexible Flyers and Super-Cheap Supercomputers cite attractive alternatives to traditional Von Neumann computers and microprocessors. One even mentions we're approaching the end of the Von Neumann age and the beginning of a new Reconfigurable computing age. Are we ready?"
The implication is that we are approaching a transition to some seriously wacked out computer designs. I look forward to seing what these people are coming up with. DNA computers, for example, have a different model of computation.
...Well, that's what the article says. I guess they haven't heard about pipelining, multiple execution units, SIMD etc etc.
"Mary had a crypto key, she kept it in escrow, and everything that Mary said, the Feds were sure to know."
I've programmed on the old bit-sliced Connection Machines, which are vaguely similar. Two points to ponder:
...? Is there a bunch of DRAM somewhere or do you carve memory out of the (expensive) FPGA?
- it was a *tremendous* pain in the ass. This Star Bridge machine isnt a general-purpose solution, it's only for applications that can stand writing 100% custom software in a custom language.
- the data has to come from somewhere. So you can do 1G operations per second. What's the I/O like? Do they use a PC for a host or an SGI or
I think you're right - handling arbitrary control flow, branching and so forth is a complex part of modern compilers, and of modern CPU hardware - and it is only possible because the CPU hardware handles all of the crazy stuff like ordering instructions, managing register contents (especially with all the voodoo that goes on behind the scenes in a modern CPU) and so forth. If you tried to do all of that in the compiler (which is effectively what you are talking about here), the compiler seems like it would have to do a lot more work than standard compilers generating machine code.
The instruction set of a modern CPU serves as the API, the contract between software land and hardware land, and that is what allows the CPU designers to go behind the scenes and do all sorts of optimization, only incrementally versioning the instruction set for large changes (like SIMD). When you eliminate that contract with the generalized computing hardware, and basically are compiling down to arbitrary HDL and gate configurations, it seems like too many degrees of freedom to manage the complexity, without additional constraints (like only trying to solve matrix or other mathematical problems, like the interesting product you point out).