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Inside the PowerPC 970
daveschroeder writes "Jon "Hannibal" Stokes has posted a long-awaited, very detailed analysis of the IBM PowerPC 970 at Ars Technica. Notable quote: 'The 970 was made for Apple'."
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See here More on the power pc posted yesterday
PAGERANK++ Robsell.com
Its like comparing apples with apples... Its a dupe.
It's ok, the last post didn't get enough comments. Please continue discussion.
Fast forward a few months....hmm...a few options:
Sun: Nice hardware, very expensive, CDE.
AMD: Commodity hardware, cheap, WinXP.
HP: Intel hardware, very expensive, CDE or WinXP.
I think I know what I'd buy.
Of course, the Athlon64/Opteron would get quite a bit of consideration due to my hobbies.
But I think it'd end up being the Mac.
... in The Matrix. That strange feeling of deja vu can only mean one thing! Either that or the /. editors are asleep at the wheel again.
Floating point ops, optimized for graphics processing and things like compression (jpeg, mpeg, mp3). If you read the Ars article he waxes on about it's superiority over MMX/SSE/SSE2.
Also: "Water is special stuff that makes stuff float."
"The CPU does important stuff."
For all of your "What is AltiVec?" needs, check this out instead:
http://www.motorola.com/SPS/PowerPC/AltiVec/
Mikey-San
Karma: +Eleventy billion (mostly affected by watching Celebrity Jeopardy)
Apple'd be putting DDR400 on the G4 right now if they could. None of this (well, except the decision to go Moto) was their fault.
My real problem with the current G4e situation, aside from the 167 SDR FSB, is the fact that it's a shared bus topology, which is just ridiculous. To my knowledge, there's nothing stopping Apple from putting out a chipset that gives each G4e a dedicated FSB (even if it's still 167MHz SDR) to the chipset.
As far as the low MHz and SDR situation, I've also never been totally convinced that Apple wasn't partially to blame for this either, unless they just have zero clout with Moto SPS.
I believe that Hannibal mentions that the 970 is designed for SMP.. Clearly CmdrTaco is just testing its newest feature: you click post and the operation gets carried out by both processors.
Tierce
Tierce
Who sponsors your feelings?
Reading through the article, its nice to see some real design going into a processor. Looking through Intel's last few chips, they've been upping ther clock speed and packing in more cache.
Yeah, yeah, they are hog-tied because you can't easily re-compile the entire windows platform to use new instruction sets. Linux users, of course, don't have this problem (muhahahah).
Did anyone else catch the bit on the twin FPU's? I'm just imagining what this thing is going to do with vector operations and frequency transforms.
For most of you non-engineers:
-Most 3d vector operations are affine tranformations. Using a 4x4 array of floating point numbers you can translate, rotate, and scale. Works beautifully, but it's a lot of calculations.
-The Fast Fourier Transform (FFT) is used a lot in signal processing. It's a floating point monster.
I understand that a while ago there was some competition between IBM and Motorola about whose chip would be the G5. Was Motorola ever a serious contender, and if so, has Apple decided on IBM? I haven't heard much about Motorola for some time.
Mot actually had a G5 on the roadmap. They apparently got all the way to samples, but then ditched the effort. There never was a competition per se wrt the G5 name. There was a bit of friction over AltiVec, as IBM wanted to focus on clock speed and didn't think AV was worth the complexity (and hence why Mot came out with the G4 while IBM stuck with the G3). Motorola hasn't been serious about the mainstream cpu market for a while as they've been losing money on it. They'd rather focus on things like embedded proccies and cell phones (and related chips).
I don't know which came first, Mot ditching G5 so Apple pleads with IBM to come out with 970. Or Mot gets whiff of 970, so sees a way out of doing G5. Perhaps others more "in the know" can chime in?
Officially, the PowerPC G5 is the Motorola PowerPC 8500 chip. So this would not be it. Apple may or may not call a computer that features IBM's PowerPC 970 the PowerMac G5 or PowerBook G5, but it wouldn't be the actual G5 chip. Although I don't think this chip officially has a G* name, I'd be more inclined to designate it the G6, since the G5 was actually a 32-bit chip.
Karma: Ran over your dogma.
Try doing audio signal processing or heavy graphics/video work.
You're pretty thankful for your Altivec then...
I saw such an insane improvement in Reaktor when it got Altivec enhanced...
i don't read slashdot anymore.
But the reality of regular high-end computing is that people don't have the time to optimize their software for the latest oddball hardware platform. And even something like a hand-coded vectorized BLAS library doesn't help because most scientific software still doesn't use such libraries.
ATLAS is a BLAS implementation that is tuned for each system that it runs on. The people at Mathworks use this as the underlying BLAS system in Matlab. Mathematica Maple, etc. use this as well. There is even a G4/AltiVec optimized version available here. This is the whole point of layered software.
AltiVec is nice for somethings.
My iTunes ripping of mp3s nearly tripled when I went from a 466 MHz G3 to a 400 MHz G4 due to iTunes being optimized for AltiVec.
Some Photoshop actions and filters see up to 800% improvments.
Running iMovie exports on a 600 MHz G3 iMac take 2-300% longer than on a 400 or 500 MHz G4
AltiVec is important for Apple marketing because it lets them claim impressive performance figures without actually needing to push the state of the art in terms of processor design further than Intel.
No, AltiVec is important for Apple full stop - in the short term to make up for the anemic bus speeds allowed by the G4, and in the longer term because a SIMD unit is now as expected a component of modern desktop CPUs as an FPU is.
And even something like a hand-coded vectorized BLAS library doesn't help because most scientific software still doesn't use such libraries
The only thing you can really sure about "most" scientific software is that it needs an FPU. Scientists and engineers do a huge variety of simulations, some of which are vectorizable and some of which aren't.
If AltiVec has a weakness in the scientific field, it's the lack of support for double precision. And there's nothing in the instruction set which precludes this, so I wouldn't be surprised to see it appear in some future CPU.
Imagine how much better it would be if Apple could ship systems based on the 970 today, rather than after a few months additional delay due to AltiVec.
If it didn't have AltiVec, it wouldn't be what Apple needs in a desktop CPU - not much point in getting what you don't need a few months early (not like that would happen anyway: this isn't lego: you can't unplug "the AltiVec bits" without any impact on the rest of the design).
And every dollar and watt that is shaved off the AltiVec price makes it a much more viable processor for servers and blades, which would get volume up and prices down.
Except that Apple aren't currently in the blade market at all, and have a fairly small presence in the more general server market. If they can sell a few boxes there, fine, but getting the volume up means targetting consumers - not server farms.
Nae bother
Don't confuse "new" with "state of the art". The former is just something that hasn't been done before. The latter is something that yields "impressive performance figures". If Altivec is competitive with Intel, then it is state of the art, by definition, even if it's 20 years old. The CPU cache is a decades old concept, yet CPUs with caches are still state of the art.
Imagine how much better it would be if Apple could ship systems based on the 970 today, rather than after a few months additional delay due to AltiVec.
Don't underestimate the cost of software. Your idea is expensive, because it requires software vendors to maintain two different versions of their code. This can lead to buggier or more expensive products, or it can lead to the "abandonment" of the G4 installed base. That could easily be worth the few months for Apple.
You'd be surprised how much stuff in Mac OS X is AltiVec optimized. Even memcpy gets a boost from it. It's a lot more than just a "gimmick".
Free Hans!
Altivec is Motorola's name for the vector processing unit. The unit handles SIMD commands. SIMD stands for Single Instruction, Multiple Data. Basically, intead of looping through a list of 50,000 values one by one and multiplying each value by PI for instance, you simply tell the CPU where the list is, and to multiply it by PI.
In a much simplified analogy, it's like lighting 200 candles with a flame thrower instead of one by one with a match.
Article X: The powers not delegated... by the Constitution...are reserved...to the people
Actually every single application that is actually pushing the PC at this point benifits from vector units. Lets look at what is somewhat strenuous for a modern PC, 3D rendering:yep, media encoding and transcoding:yep, audio processing and creation:yep, 3D gaming:yep, etc. Basically all of the applications that will push a PC are things that process large chunks of data that can be worked on efficiently by a vector processing unit. This isn;t a server processor, it's a PC processor. If you want a server processor get a Power4 or Power5 with the huge cache and multicore chips that are designed for that market.
There are 4 boxes to use in the defense of liberty: soap, ballot, jury, ammo. Use in that order. Starting now.
"AMD is delivering fast SIMD today, not next year"
What ARE you blathering about? Pentium 4 has SSE2, PowerPC has Altivec - here's a clue for you, when people code for x86 SIMD, they choose MMX, SSE and SSE2, they don't choose 3D Now!, when people code for SIMD under PowerPc ISA, they choose Altivec. Both SSE2 and Altivec are available to day, both are used in "commodity" CPU families. I think you'll find that it's "x87" FPu strength that typically marks out AMD's current CPUs, not their patchy implementation of SSE2.
That was classic intercourse!
You just use fixed-point arithmetic instead of floating-point (i.e. a fixed 32 bits of precision, or 16 bits, or whatever). A simple way of doing is is to make INT_MAX/2 = 1.0, -INT_MAX/2 = -1.0, and everything in between scaled appropriately. (/2 to avoid overflow). Then you implement fixed-point addition, multiplication, division, and subtraction (as commonly doing in hardware DSP chips) and you've got yourself an integer-only FFT.
Some really old C code doing something along these lines is available here.
10 PRINT CHR$(205.5+RND(1)); : GOTO 10
Well, not really, but you're close. You can't just pass the Altivec unit an array of numbers and tell it to do some operation on them. Altivec (and MMX, etc) simply allows you to process the data in bigger chunks that normal.
Altivec can process 128 bits of data at a time. For example, it can add 16 8-bit integers to another 16 8-bit integers, resulting in yet another vector of 16 8-bit integers with a single instruction, rather than doing them one at a time.
For me, the most interesting part of the article concerns the pricing of the new machines as the real question. According to the author, the chip will make Apple machines technologically competitive. The question is, will Apple price them to gain market share, or continue to sell to a disappearing niche of luxury computer buyers.
Maybe Apple's concentration on developing software, and selling that software (rather than giving it away), along with its new business ventures, such as .Mac and the new iTunes online music store, point to a new business model that can afford to cut the margins on hardware.
If they don't lower the price of their machines -- the top ones, namely -- they will suffer, long-term. I don't think they need to be on par with PC's; I just think they cannot be too much more expensive than the PC's.
quiquid id est, timeo puellas et oscula dantes.