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VIA's New Nehemiah M10000 Processor Reviewed

Posted by timothy on from the low-power-madness dept.

Joseph Wharton writes "Mini-ITX.com has a review of VIA's new Nehemiah M10000 EPIA-M motherboard and processor. Some of the new features include a full-speed floating-point unit (finally!), SSE instructions, 64KB of full-speed L2 cache, and (get this) a hardware-based random number generator. Also, there's IO/APIC support in these new procs, potentially paving the way for dual EPIA boards."

2 of 240 comments (clear)

  1. Book of Nehemiah: by bugsmalli · · Score: 4, Interesting

    Wasn't sure about Nehemiah, so googled and found this:
    Book of Nehemiah:
    This book continues the history of the children of the captivity, the Jews lately returned out of Babylon. We have a full account of Nehemiah's labours for them, in these his commentaries: wherein he records not only the works of his hands, but the very workings of his heart, inserting many devout reflections and ejaculations, which are peculiar to his writing. Twelve years he was the tirshatha, or governor of Judea, under the same Artaxerxes that gave Ezra his commission. This book relates his concern for Jerusalem and commission to go thither, chap. 1, 2. His building the wall of Jerusalem, notwithstanding much opposition, chap. 3, 4. His redressing the grievances of the people, chap. 5. His finishing the wall, chap. 6. The account he took of the people, chap. 7. His calling the people to read the law, fast and pray, and renew their covenant, chap. 8 - 10. He peoples Jerusalem and settles the tribe of Levi, chap. 11, 12. He reforms divers abuses, chap. 13. This was the last historical book that was written, as Malachi, the last prophetical book of the old testament.

  2. Re:64K cache by tjrw · · Score: 5, Interesting

    The write-up is misleading...
    The 64k is the L2 cache which is 16-way set-associative, full-speed and exclusive i.e. it doesn't overlap with the contents of the L1 cache. The L1 cache is 128k unless they've changed it (none of the immediately available info mentions the size, but that's what the current C3 has).

    So, actually the chip has 192K of cache, configured pretty much the same as it was in the AMD Duron (128k L1, 64k L2, exclusive). Considering the target marketplace and performance of the chip, this seems to be plenty.