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AMD's Next Generation Processor Technology
Esekla writes "AMD has released info about their upcoming processor technology. The press release claims that they're producing circuits that run 30% faster than any other published benchmarks using "Fully Depleted" Silicon-on-Insulator and AMD's metal gating technology and actually has a good bit of technical detail for a press release."
Polysilicon has been the gate material of choice because it is much easier to process. However, metal would reduce the resistance of the gate. (The gate acts like a little capacitor, and the resistance of the gate affects the amount of time it takes to charge up and discharge, which affects the switching time.) I think the processing ease of Polysilicon is lost when you don't use Silicon dioxide as the gate material - for example, if you used a high-K dielectric. I don't know if metal is inherently more compatible with high-k materials, just that it's less compatible with SiO.
They also mention the metal gives a "tunable work function" (probably by adjusting the silicon/nickel ratio), which I would guess would change the turn on voltage of the transistor. Tuning the turn on voltage could certainly tweak up the speed a bit.
It's not wasting time, I'm educating myself.
Metal gates have 4 main advantages in advanced CMOS transistors:
(1) The gate resistance is reduced. This lowers the switching delay in some cases. Remember that the delay is proportional to the product of the resistance and capacitance (the 'RC' product).
(2) In polysilicon gates, the free carrier density is very high (1E20 carriers per cubic cm). Even so, under high electric fields that are needed to switch a transistor, there is a small depleted layer created right at the interface of the gate and the dielectric. This effectively acts as a capacitor in series with the dielectric and increases what is called the "effective oxide thickness". This is very bad, especially when process engineers are trying extremely hard to reduce the oxide thickness. At the scales we are at now, every Angstrom counts. In metal gates, the carrier density is 1000X higher. This makes it much harder to deplete and you regain the 4 angstroms. This means either higher performance with the same gate dielectric thickness, or you can get the same performance and increase the dielectric thickness by 4A, thereby reducing the gate tunneling leakage current (and hence power) by an order of magnitude. This is a big deal.
(3) Some high dielectric constant materials (that are candidates to replace silicon dioxide) are not very compatible with polysilicon. This could mean either thermodynamic instability or interfacial charge created that "pins" the workfunction (and affects the switching threshold voltage of the transistor)
(4) In fully-depleted silicon on insulator (FD-SOI, or "depleted substrate transistor" in Intel parlance) transistors, the threshold voltage comes out wrong when using doped polysilicon gates. It makes the transistor either too slow or too leaky. There is a desperate need for tuning the threshold voltage by using a different workfunction which can be found in some metal gates.
Of course, metal gates aren't without their problems. (the predecessors of today's transistors had metal gates - hence the 'M' in CMOS - Complementary METAL Oxide Semiconductor - which were replaced by polysilicon gates for processing ease.) Inability to be easily patterned, withstand high processing temperatures, reliability issues are just a few of them.