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DARPA Looks Beyond Moore's Law
ddtstudio writes "DARPA (the folks who brought you the Internet) is, according to eWeek, looking more than ten years down the road when, they say, chip makers are going to have to have totally new chip fabrication technologies. Quantum gates? Indium Phosphide? Let's keep in mind that Moore's Law was more an observation than a predictive law of nature, despite how people treat it that way."
First they want to get around privacy laws, now they want to break Moore's law...these guys have no bounds!
"It takes considerable knowledge just to realize the extent of your own ignorance." - Thomas Sowell
perhaps stacked wafers with vertical interconnects might help... I'm not sure how you'd dissipate the heat, though.
Moore's law, bah! Thinking about it, DARPA should get Steve Jobs on board to study his Reality Distortion Field. Think of the military aspects of.......oh, wait. We already have that.
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It's just a wild guess. It has absolutely nothing to do with physics, which is the real laws we all live by. It has much more to do with human laws such as patents and copyrights that limit progress.
-Libertarian secular transhumanist
hardware has progressed dramatically over the past decade and left software somewhere behind... there is nt much use for faster and faster servers when software doesn't keep up the phase... this decade will be a "software decade"
I"m pretty excited about the new man-made diamonds that are supposed to be able to keep moore's law going for decades when they come out. Wired had an article recently and a post here on /. too
Therefore i propose: "Moores Law 2: Anyone mentioning his name in a discussion aboout semiconductors, CPU's or transitsors have lost the discussion."
Proud patriot and republican voter.
This diamond article in Wired 'http://www.wired.com/wired/archive/11.09/diamond. html' seems to indicate that Moore's law is sustainable for much more than ten more years.
Besides, I've been hearing about the death of Moore's Law for the last ten years.
"The market alone cannot provide sufficient constraints on corporation's penchant to cause harm." -- Joel Bakan
Let's keep in mind that Moore's Law was more an observation than a predictive law of nature, despite how people treat it that way.
Let's not and say we did.*
Seriously, I doubt that many people think that Moore's law is on an equal footing as say gravity and quantum mechanics. Still, an observation that has held more or less for nearly 40 years is worth considering as a very valuable guideline. Let's keep this in mind as well.
(*Why do vacuous comments like this make it into slashdot stories?)
This idea of speeding up processing speed is barking up the wrong tree and ultimately doomed to failure. We need to be focusing our attention on biochemistry and molecular biology. We already have drugs that slow your reaction time, thus making things appear to happen more quickly.
See, if we get everybody to take xanax or zoloft, there's no limit to how fast computers will appear to be working.
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I saw this article about new diamond manufacturing techniques and it's an interesting read. Having diamond based processors looks like a viable technology in the near future and heat dissipation is one of the major reasons that they're considering diamond.
I'm just worried about what my wife will say when the diamond in my machine is bigger than the one on her finger...
-B
a) Chips are already "stacked". Layer over layer of silicon.
b) If you are talking about stacking dice (That is, literally stacking chips inside the package) then the distance the information would have to travel when going trough the "vertical interconnects" would be thousands or tens of thousands bigger than the distance of any on-chip interconnection. Which means the communication between layers of stacked chips would be thousands of times slower. Not very good for microprocessors..
Every 18 months, someone will develop a new law to compute the rate at which the estimate of the rate at which the number of transistors on semiconductor chips will double will halve.
There are no karma whores, only moderation johns
You aren't being forced to do anything... you simply choose to do it to keep up with the times. Many consider this "progress".
The unofficial
Computer salesmen are using it like a club. You figure it would drive innovation, instead of driving CPU manufacturers take advantage of comsumer ignorance and do fairy magic with clock speeds. We should call it "Moore's Observation".
Auto-reply to ACs: "Truly, you have a dizzying intellect."
An educated observation, which is why it basically works.
Please note that the observation was well enough educated that it includes the fact that its validity will be limited in time frame and that before it becomes completely obsolete the multiplying factor will change, as it already has a couple of times.
In order to understand Moore's Law one must read his entire essay, not just have some vague idea of one portion of it.
Just as being able to quote "E=mc^2" in no way implies you have the slightest understanding of the Special Theory of Relativity.
KFG
> The Bush Method: all you have to do is take the thing about reality you want to distort, and state that it has changed, whether or not it hasn't
Why do you give Bush the credit? This shit is Marketing 101 and Politics 102.
The unofficial
Moore's law is already ending. Intel's Prescott (i.e. Pentium 5) CPU dissipates 103 watts. That's beyond anything you can put in a laptop, and it's arguably beyond anything that should be in a workstation-class PC. But it also may not be that we're hitting CPU speed limits, just that we're hitting the limits of type types of processors that are being designed. Much of the reason the PowerPC line runs cooler than the x86 is because the instruction set and architecture are much cleaner. There's no dealing with calls to unaligned subroutines, no translation of CISC instructions to a series of RISC micro-ops, and so on. But there are the same fundamental issues: massive amounts of complexity dealing with out of order execution, register renaming, cache management, branch prediction, managing in-order writebacks of results, etc.
Historically, designing CPUs for higher-level purposes, other than simply designing them to execute traditional assembly language, has been deemed a failure. This is because generic hardware advanced so quickly that the custom processors were outdated as soon as they were finished. Witness Wirth's Lilith, which was soon outperformed by an off-the-shelf 32-bit CPU from National Semiconductor (remember them?). The Lisp machine is a higher profile example.
But now things are not so clear. Ericsson designed a processor to run their Erlang concurrent-functional programming language, a language they use to develop high-end, high-availability applications. The FPGA prototype was outperforming the highly-optimized emulator that had been using up to that point by a factor of 30. This was with the FPGA at a clock speed of ~20MHz, and the emulator running on an UltraSPARC at ~500MHz. And remember, this was with an FPGA prototype, one that didn't even include branch prediction. Power dissipation was on the order of a watt or two.
Quite likely, we're going to start seeing more of this approach. Figure out what it is that you actually want to *do*, then design for that. Don't design for an overly general case. For example, 90% of desktop CPU use could get by without floating point math, especially if there were some key fixed point instructions in the integer unit. But every Pentium 4 and Athlon not only includes 80-bit floating point units, but massive FP vector processing units as well. (Not to mention outmoded MMX instructions that are almost completely ignored.)
But also thousands or hundreds of thousands of times smaller than going outside the package; which would make it ideal for multi-processors, array processors, or large local caches.
A lot of posters sem to think that DARPA, the US military, or the US government is a unified thing. It's not. Each part often have their own agendas. Research is very frequently driven by those agendas.
However, DARPA often CYAs when it comes to research too. If you come up with a whacky idea that might just work they often will fund it even though it is in competition with another they have. The reason being that they then can see which whacky idea actually works. Often none do. or one does. or nother that seemed like a sure thing doesn't.
A long story short, if quantum computing doesn't turn out to be all that, they've covered their techno @$$3$.
Do you know why the road less traveled by is littered with the bones of the unwary?
False, there is just one active layer of single crystalline silicon that contains the devices. The remaining layers are interconnects.
b) If you are talking about stacking dice (That is, literally stacking chips inside the package) then the distance the information would have to travel when going trough the "vertical interconnects" would be thousands or tens of thousands bigger than the distance of any on-chip interconnection.
How, why? the lateral extend of any die is usually bigger than its height. In fact the distance would be much shorter. Active layers would be seperated by less than 100micrometers.
Sounds like a nice idea for the desktop or for certain classes of research, but there will always be a place for massive computational capacity on a single chip since there is a large class of computing problems which are not easily parallelizable, and hence can not take advantage of parallel computing.
Incidentally, there is also a limit to how fast your parallel computer will get... it's call the bus. If you can't build high speed interconnects, or if your software isn't designed well (not as easy as it sounds!), you will inevitably have problems with the system bus becoming overtaxed. Heck, this is already a problem in our primarily single-CPU world.
The era of biological computing when I can just sneeze on my PC to double its RAM!
AT&ROFLMAO
Yes, but the current parallel computers have huge performance costs...they can easily spend over half their time coordinating themselves on many kinds of problems. Of course, on well structured problems there probably isn't a better solution possible.
Two major answers occur to me:
Answer one is that we figure out how to automatically decompose problems into independently solvable threads.. a quite difficult problem.
Answer two is that we build special purpose parallel processors to handle parallelizable tasks efficiently (sound processors, visual cortexes, etc.) and use them as/from demons to maintain environmental awareness. Then we divvy everything we can into separate threads. Dedicate one CPU to coordinating between processes (with possibly hot-switchable backups). And do the best we can.
Answer two seems to be "sort of" the approach that biological design takes...at least in mammals.
I think we've pushed this "anyone can grow up to be president" thing too far.
They made an announcement about it less than a year ago. They don't say if they'll be doing anything special about heat problems, though.
Thank Goodness someone has finally said something about it, even if it was just in passing. The bonus is that it is on the front page of Slashdot.
t m
"Moore's Law" is no more a "law" in the sense of physics (or anything else for that matter), than any other basic observation made by a scientist or physicist.
Oddly, you'd have a hard time believing it wasn't a Law of Nature by the apocalyptic cries from the technology industry when "Moore's Law" falls behind - spouting that something *has* to be done immediately for Moore's Law to continue, lest the nuclear reaction in the Sun cease. Or something.
At the time it was coined by the *press* in 1965, only a small fraction of what we now know was known about the physics of integrated circuits and semiconductors at the time. So, looking back it's easy to see that the exponential trend in density would continue as long as the knowledge and abilility to manipluate materials increased exponentially.
Yes, it is rather surprising that Moore's observation has held true as long as it has. And this isn't to say that the growth trend won't continue, but it will certainly level off for periods while materials or manufacturing research comes up with some new knowledge to advance the industry.
As the article indicates, things are likely headed for a plateau, possibly toward the end of this decade or start of the next. And at that point, Moore's observation will simply no longer be true or appropriate.
Let the cries of armageddon begin as "Moore's Law" is finally recognized as an observation that will eventually be outlived.
For a little "Moore" background, see http://www.intel.com/research/silicon/mooreslaw.h
Right on a). well, mostly -- IBM has a new process that does allow transistors in some area-IO to be placed over logic gate transistors. It's more trouble than it's worth, though (unavoidable interactions are hard to calculate accurately).
:). See, it's not that it's further to go vertical from one die to the next, rather than packaging each individually and connecting them horizontally. The problem is it's hard to go vertical. This is true from design, manufacturability, and reliability points-of-view.
And right on b) -- the distance between 2 dice stacked is much shorter than 2 side-by-side. But this is totally irrelevant, mostly due to previous posters
First, by area-IO I meed input/output (IO) drivers or receivers that can be placed anywhere in an area, rather than only around the circumference (preipheral IO). We have area-IO at the package level (such as BGA, or Ball-Grid-Array and FCBGA, or Flip-Chip Ball Grid Array [best for area-IO, and expensive]) and area-IO at the die level. Do we connect the dice before or after packaging?
Either way presents problems. Such as (for pre-packaging connections):
How do you electrically connect 2 area-IO dice? Usually, a die has little square landing pads, and these are only about 50um square, spaced every 200-250um or so on center in 2-D arrays of up to 70x70 and more. To be able to do anything with these tightly packed little signals, we drop special tiny drops of metal that stick to the pads, and press this up against a package substrate (ceramic), which includes routes to space those signals out more, like every 1.0mm or so. Even this is expensive and hard to mount to PCB, since it's hard to ensure both things are perfectly flat (package and PCB) so that all balls connect.
In fact, we rely on the package (often including an internal metal "stiffener") to keep the die nice and flat, which helps avoid de-lamination (layers peeling apart). Two dice pressed next to each other would require some space between them to make the connection (i.e., some bumps for the connection, and valleys for no connect areas), and this and the elasticity of the electrical connection medium would leave enough play to let the dice warp all over the place.
It'd be even harder to tell which ball(s) aren't connected. We do this now by confirming that the PCB is OK (usually pretty easy, so it makes a good reference), make the chip send specially-controllable data out (and take data in on inputs), then check to see what's right and wrong by measuring at the board level. If my board is another chip, how do I know which one I am debugging? This debugging (we call mfg testing) happens to all chips, not just some samples. If it isn't, failure rates will go up to unacceptable levels (like 20-50% or more).
Testability is hard if you stack dice before or after packaging. Design is a bizzotch too, since you can't very well even model one whole chip at a time (and how the circuit performs depends on process, voltage, and temperature), much less two chips stacked with an insulator and some kind of very short, very small, very fragile, very susceptible to noise and crosstalk hunk of 1000+ wires between them. One local hot spot at X,Y on die A can mess up operation at x,y on die B, and we'd never be able to practically predict that.
Most importantly of all, part of the reason chip design even works at all, and that we can churn them out for pennies each (after massive design and capital outlay for a fab), is that we can simplify the design dramatically by making assumptions, modelling the target device in isolation, verifying it in isolation, and then being able to safely assume this (truly wrong) assumption of isolation is close enough to true that the part will work in the system. Single packaged die are relatively infinitely insulated from everything except the I/O we carefully design. Stacked dice would not be -- they would interact strongly with each other in unpredicatab
everything in moderation
Think about this: Why is video graphics hardware so much faster than CPU's? You might say that it is because the video card is specifically designed for one task... however, these days, that isn't really true. Modern video cards allow you to write small -- but arbitrary -- programs which are run on every vertex or every pixel as they are being rendered. They aren't quite as flexible as the CPU, but they are getting close; the newest cards allow for branching and control flow, and they are only getting more flexible. So, why are they so much faster? There are a lot of reasons, but a big one is that they can do lots of things at the same time. The card can easily process many vertices or pixels in parallel.
Now, getting back to C... A program in C is supposed to be executed in order. A good compiler can break that rule in some cases, but it is harder than you would think. Take this simple example:
This is just a piece of C code which takes a list of numbers and produces another list by adding one to each number.
Now, even with current, mostly-serial CPU's, the fastest way to perform this loop is to process several numbers at once, so that the CPU can work on incrementing some of the numbers while it waits for the next ones to load from RAM. For highly-parallel CPU's (such as many currenty in development), you would even more so want to work on several numbers simultaneously.
Unfortunately, because of the way C is designed, the compiler can not apply such optimizations! The problem is, the compiler does not know if the "out" list overlaps with the "in" list. If it does, then the compiler has to do the assignments one-at-a-time to insure proper execution. Imagine the following code that calls the function, for example:
Of course, using the function in such a way would not be very useful, but the compiler has to allow for it. This problem is called "aliasing".
ISO C99 provides for a "restrict" keyword which can help prevent this problem, but few people understand it, even fewer use it, and those who do use it usually don't use it everywhere (using it everywhere would be too much work). It's not a very good solution anyway -- more of a "hack" if you ask me.
Anyway, to sum it up, C generally requires the CPU to do things in sequence. As a result, CPU manufacturers are forced to make CPU's that do one thing at a time really, really fast, rather than lots of things at the same time. And, so, since it is so much harder to design a fast CPU, we end up with slower CPU's... and we hit the limits of "Moore's Law" far earlier than we should.
In contrast, functional languages (such as ML, Haskell, Ocaml, and, to a lesser extent, LISP), due to the way they work, have no concept of "aliasing". And, despite what many experienced C programmers would expect, functional languages can be amazingly fast, despite being rather high-level. Functional languages are simply easier to optimize. Unfortunately, experienced C/C++/Java/whatever programmers tend to balk at functional languages at first, as learning them can be like learning to program all over again...
So, yeah. I recommend you guy
We're trying.
:)
But how do you get "micron high" little gold studs to stick to the die in exactly the right places? How do you make sure each gold stud is exactly the same height (can't have a short one anywhere, even by a femto-meter)? Then, how do you physically/mechanically line them up exactly and keep them together perfectly for long priods of time under fairly wide ranges in vibration and temperature ranges? How do you prevent the dice from warping if each stud isn't 100% identical (such as if you try to tolerate some height variation by making the studs slightly compressible)?
Since you're using area-IO to connect the dice, how do you power them? Usually, in area-IO die the power comes from the top (like an IO buffer), but in a stacked die this would just lead to another die. You can't power from the "bottom", since that's not metal (it's Si substrate), and you need really big power wires to get all over the dice from somewhere. If from the top, do the tiny wires shoot out the sides between the two dice and then go to a power, uh, plug? Connector with tiny wires on one side, or what? And I do mean tiny -- the little metal studs would need to be placed every 200-300um apart, in a 2-D array, and some would have to connect to a power source, somehow.
If you got this far: how do you design a chip with identical, but mirror-image IO locations of another chip, which presumably does a different thing? It's a huge battle in system design these days to get a chip package pinout that makes both the PCB designers and the die designers happy. Making 2 die designers happy with one chipl-level pinout would be impossible.
Finally, given that gross simplifications and assumptios about near-perfect isolation used in modern chip design, how long until you can have the hardware and software ready for me to be able to calculate iterative solutions to 500 million simultaneous, co-dependent variations on Schroedinger's Wave Equation? (of course, it's intractable, so iteration is your only hope -- better pray for convergence too!) Oh, and I need that to take less than 6-12 hours each run to make a reasonable design schedule.
everything in moderation
Well according to this article on wired the promise of molecular computing is far far far beyond Moore's law. Not only in its processing power, but also in storage capacity, production, speed of production. Biomolecular electronics will change everything within the next 20 years (hopefully). We cant even imagine or predict what will happen. I just hope that our current stupid IP laws do not hinder this. I wouldnt be surprised if some new SCO tries to stall this technologies. Just in the name of making a underved profit.
It wasn't a guess, it was a statement of company policy.
The manufacturers try to strike a balance between a high R&D investment (with rapid advances in technology) and keeping the technology in production long enough to generate a good return on that investment. Moores Law represents the 'sweet spot' that manufacturers had settled on.
While it's held quite well in recent decades, there's no guarantee it will continue to hold. If they hit a technological wall, or economic conditions cause a drop in investment, things could slow. If a major discovery is made, or an 'arms race' develops between the major players, things could speed up. IBM did this in the hard disk market, they cranked up their R&D effort, and for a while hard disks advanced more quickly than Moores Law would predict.
Quidquid Latine dictum sit, altum videtur (anything said in Latin sounds important)