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New Pentium 5 Details - 5-7ghz?
zymano writes "This article gives some details on Pentium 5. It will have 64 bit extensions and maybe a 4000 mhz frontside bus. Quote from the article,'The Pentium V is likely to fly along at between 5GHz to 7GHz, have 2MB plus of level two cache, be built on a 90 nanometer process, and have a stackable design. '"
Is it me or would you pronounce that "Nail 'em"? A dig at AMD perhaps?
Mid-Eastern Pennsylvania Gaming Convention
... will it be able to do Math correctly?
Donte Alistair Anderson Roberts - hi son!
Karma: Chameleon
'The Pentium V is likely to fly along at between 5GHz to 7GHz, have 2MB plus of level two cache, be built on a 90 nanometer process, and have a stackable design. ' And raise the temperature of the room it's in by 50 Celsius.
Karma: Excellent^(-t/Tau), Tau=Wittiness/Trollishness
The chip will sample internally at Intel in January 2004 and will take between four to six months to get to market. The Pentium 6 will follow a very similar schedule.
The Pentium V is likely to fly along at between 5GHz to 7GHz, have 2MB plus of level two cache, be built on a 90 nanometer process, and have a stackable design.
The processor we believe, sits in the LGA 775 pin socket, and above it is a very thin heatsink. But, according to sources close to the firm's plans, another permeable heatsink can sit between this and another microprocessor module, giving a stackable design.
The final design of this arrangement is not set in stone.
According to this source, and the details have not been confirmed, a module sitting on top could provide 64-bit extensions.
And the source claimed, Microsoft is ready to launch a version of Windows called Elements with 64-bit extensions.
The idea seems to be that people can buy a 32-bit module, and then add in the 64-bit processor.
There are three samples of an arrangement of the Pentium V here in Taiwan this week, with a very thin processor and lots of wires and patches stuck on it, just to show proof of concept.
The Pentium V could have a front side bus speed of as much as 4000MHz, the source claimed, although this may be reserved for the next chip along, the Nehalem.
Looks good for your age..
This article is all speculation...
Ok here, um the next AMD processors will be faster than before, have more cache, maybe some new instructions [doworkNow! then doworkNow! (ext)].
I must be an AMD insider now, l33t l33t !
Tom
Someday, I'll have a real sig.
Stackable designs sound really cool in the sense that you can cut latency between processors (for things like cache coherence) to rediculously small levels, but what about cooling? Cooling ability is roughly proportional to surface area, and two stacked chips will make twice as much heat but have almost the same surface area as only one (as two sides cancel out). This has to be a problem.
No this is not a troll. I honestly wonder how they expect to accomplish this.
Anyone know?
Cheers,
Justin
I still prefer AMD chips for some reason.
Outdoor digital photography, mostly in New Engl
but will actually perform the same as a 2.5 GHz Athlon
1p}{ 1 sp34k |33+ +|-|e|\| p30p13 \/\/il| 8e i/\/\pr3553|)
Proccessor. Add-on? OS. Add-on? This sounds like a clever attempt to creat a support nightmare for anybody developing for the pentium pentium. Oh well.
Looks good for your age..
The article doesn't say the processor will have 64-bit extensions. The article doesn't say anything.
Some quotes:
"The Pentium V is likely..."
"The processor we believe..."
"The final design of this arrangement is not set in stone."
"...details have not been confirmed,..."
"... the source claimed..."
"The Pentium V could have..."
"...although this may be reserved for the next chip along, the Nehalem"
This isn't news, this is BS speculation.
I swear that the PIV 2.4 Ghz machines I've used are no faster that some of the P III 1 Ghz boxes I've used. We upgraded all our development boxes at work this way and there was hardly any notable improvement... yes, the memory is tricked out so we're not having swapping issues. But you run apache, mysql, and X on one of them and it just doesn't seem like an improvement.
Are they doing a direct trade off where they ramp up the clockspeed and break the instructions down so that less is getting done per clock or something?
Cheers.
Running at 5-7GHz is absolutely retarded for a processor to do. If you look at the way that every single "wire" in the professor acts, they all must be treated like transmission lines. just sitting there and doing thost calculations to find out how much power is being delivered would be the most bit*h/bullsh*t job every. A processor running that fast would probably lend its self to using onboard optical systems (waveguides) and running parts that way so as not to have to deal with running copper or Al and doing all of the insane calculations associated with that.
Oh and by the way, i'm running a PIII750 and the only things i would upgrade to are Apple and a 64bit processor. I'm not going to upgrade for a long time.
-=gabe2=- macbook dual 2.0
The clock speed hike reminds me that the P4 is slower clock-for-clock than the P3, and makes me wonder if Intel are doing this entirely for marketing reasons. I can't help feeling that they should start looking more closely at the other end of the market. Saying that 100W is acceptable in a desktop CPU does not make it so. For a large number of people 1GHz is fast enough, and a silent 1GHz chip would be more welcome than a 5GHz chip with a built-in tornado.
I am TheRaven on Soylent News
The Pentium V is likely to fly along at between 5GHz to 7GHz, have 2MB plus of level two cache, be built on a 90 nanometer process, and have a stackable design.
Will it make coffee?
There's no point in raising the speed of the processor to 5GHz if the memory speed (esp. latency) can't keep pace.
4GHz front-side bus? Yeah, right.
I calculated a while ago that assuming that RAM was 5 cm away from the CPU, at 5 GHz a clock cycle would be lost on waiting for the signal to travel the 5 cm to the RAM and back.
If the speed of light is not far from being a limit at this point, then clock speed improvements can't continue working for long.
Besides, there's the question of whether it will "fly" or not. Clock speed doesn't measure performance. It especially says nothing of the performance of a new chip.
P-V should have 64bit extensions for both pointers and basic math.
64bit pointers and basic math on those pointers, are really what people desire so that more than 4GB can be trivially addressed in a single process's virtual memory space. Think about people who want to manipulate a video file that is larger than 4GB.
AltiVEC **128 bit** is just wide data manipulation and is of no use for those that require large memory footprints. It has the same 32 bit address lines and pointers at a 60MHz Pentium I.
That being said, P-V should also have more than the current 36 bit of physical address lines. I'm guessing they will have 40 usable bits or so of the address bus to physically address memory.
So if you want to put in more than 4GB of RAM you can. But if you don't, 64 bits will be useful to address more than 4GB of a video file sitting in virtual memory.
Windows will certainly get just as bloated and suck down all that speed and power. That's how it has always been, and always will be.
I'm waiting for the day that Microsoft Windows GUI will be fully raytrace/radiosity/photon map rendered.
I won't be happy unless I have a glass refracting mouse cursor made up of at least 64,000 triangles, updating at no less than 60fps. It had better be casting both a shadow and also focused light complete with chromatic aberation.
That'll show those OSX zealots!
War crimes, torture, lies, illegal spying... Would someone give Bush a blowjob, already, so he can be impeached?
Intel: "Oh my god this is so AWESOME because we have super high gigahertzian-ness and you dooooooooon't!"
AMD: "Uh... We don't need GHz to keep up. That's what We have these new nifty + ratings eh?"
Intel: "Uh... HYPER-THREADING! WE'RE AWESOME!"
AMD: "And we have a better 64-bit processor than your dinky Itanium. It doesn't need to 'emulate'. What a bunch of idiots."
Intel: "OMG OMG! WE HAVE ULTRA 1337 SPEED! I MEAN 5-7 GHZ AND 4 GHZ FSB! I MEAN AREN'T WE COOL! 64-BIT EXTENSIONS!"
AMD: "... Shut up. Better yet, don't shut up. It's good for our business, because at least we're delivering."
Speaking of redundant...how many people have posted saying Pentium 5 is redundant?
There ain't no rules here; we're trying to accomplish something.
If you look at media benchmarks, encoding requires a lot of processing power. So, while ripping your DVD may not take any more time on your P3-1GHz versus your P4-2.4GHz, converting it to DivX MPEG-4 for your media jukebox will take significantly longer on the P3 than the P4. In fact, decoding H.264 video and WMP9 High Definition supposedly requires 3GHz (or the equivalent in AMD doublespeak) processors. Add to that the fact that you may want to do more than one thing at once (i.e. encode video in the background and play back another), and you will quickly run into a hard wall. Check out this link for a very nice roundup of how older processors fare against newer processors. A simple DV-to-MPEG2 conversion takes approximately twice as long on a P3-1GHz than it does on a P4-2.4GHz. That's a lot of time when you have a couple of hours of video to encode. Audio and image manipulation applications, video editing and the like will also benefit in similar ways.
Games, it goes without saying, scale in a similar way and a similar doubling of performance.
The caveat: for many business applications, you will hardly notice a difference. A faster I/O subsystem and more RAM, as you mention, will pay much larger dividends for these users than any processor upgrade will. In fact, this post is being written up on my trusty P2-400MHz all-SCSI box and it's still going strong, though it's getting a bit long in the tooth.
It complicates cache design, yes, but it's a solved problem.
In x86, you can store into instructions. Even right before they get executed. Even right before they get executed by another CPU. And it all works right. Now that causes architectural complications.
Think about what that means. The superscalar processor is happily going along, executing several instructions ahead simultaneously. Then information comes in that some instruction already executed but whose results have not yet been committed to memory has been overwritten. The processor has to discard everything dependent on that instruction, back up, and do it over.
It sounds horrible. But if you view it as another case of speculative execution (where, at a branch, the CPU starts executing on both paths until the branch is decided) it starts to become clear how to implement this in silicon.
The key to all this is the "retirement unit", which first appeared in the Pentium Pro. The Pentium Pro was the first "modern" x86 machine. Up until the Pentium Pro, what went on inside the CPU was reasonably closely related to the user-level instruction set. In the Pentium Pro, the user-level and internal architectures parted company. Inside a Pentium Pro/II/III/IV is a dataflow machine, pipelining little self-contained operations expressed in an internal instruction set that's quite different from the one the programmer sees. The dataflow machine is front-ended by an x86 instruction translator, and back ended by the "retirement unit". The "retirement unit" takes the outputs of the dataflow machine, figures out which ones to keep and which ones to dump, and determines what gets stored in the programmer-visible registers and memory.
In addition, the Pentium Pro and later machines have far more registers in the CPU than the programmer sees. The Pentium Pro and later have 40 or more registers storing temporary results. Storing data in a temporary variable on the stack just puts it in a register representing that stack slot. There's little or no penalty for this compared to having the value in an x86 register. Eventually the retirement unit pushes the value out to memory (i.e. cache), but the processor doesn't wait for that event.
Once architectures broke the problem apart like that, the programmer-visible instruction set didn't matter that much. This is why RISC isn't very important any more. The original RISC idea, as expressed in early MIPS machines and the DEC Alpha, was to have simple, fixed-sized instructions, a simple CPU, and execute one instruction per clock. This made sense when non-RISC machines were executing less than one instruction per clock.
But the Pentium Pro architecture changed all that. Now, more than one instruction was being executed per clock in a microprocessor. To keep up, RISC machines had to go to similarly complex architectures, losing the simplicity advantages of RISC, while keeping the code bloat of fixed-size instructions.
There are other ways to accomplish the same result. AMD does instruction translation when instructions move into the cache. Transmeta does it in software when the program is loaded. But none of today's fast machines are directly executing what the programmer wrote.
That's why instruction set architecture doesn't matter much any more.
All this takes huge transistor counts, and acres of chip designers. (Intel's acres of chip designers, each in their own tiny cubicle, with one acre of cubicles per room, are at Intel's Santa Clara facility. I've been there, but fortunately don't work there.) But it all works.
Can you name the OS with four wheel drive, smells like a steak and seats thirty-five..
Canyonero! Canyonero!
Well, it goes real slow with the Pentium down, It's the operating system endorsed by a clown!
Canyonero! (Yah!) Canyonero!
[Bill Gates:] Hey Hey
The Linux Users' commission has ruled the Canyonero unsafe for WAN or LAN use.
Canyonero!
12 gigs long, 2 gigs wide,
65 tons of Windows Pride!
Canyonero! Canyonero!
Top of the line in crash reports,
Unexplained reboots are a matter of course!
Canyonero! Canyonero! (Yah!)
I ran out of creativity here.
"You're right," Fisheye says. "I should have set it on 'whip' or 'chop.'"
Well MY inside source tells me that Intel are ready to release the Pentium X, running at 50 Ghz and having a FSB of 25,000 Mhz.
.......... yes, yes ........ THEY'RE ON SALE NOW!
It has their patented uber-cool ultra-wizzer-extra-special 128-bit extensions, and it also has an expansion port that you can slap an extra processor on in case AMD releases a 256-bit processor in the meantime.
This thing is going to scream, baby! It will plug into existing Slot-1 motherboards, and will be built on a 2 nanometer process.
Microsoft are believed to already have a version of Windows running on the beast, with their new 'WTF That's Friggin Incredible Mate' extensions that go hand in hand with Intels 'Fuck Me If This Isn't A Faster Chip Than AMD Has' architecture.
Wait a moment