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Intel To Produce 65-Nanometer Chips In 2005

Ridgelift writes "In keeping with Moore's Law, Intel will begin mass-producing chips using 65-nanometer process technology in 2005, according to a ZDNet article (additional coverage at EE Times and The Inquirer). Intel recently produced a Static Random Access Memory (SRAM) cell at 0.57 square microns, in comparison to 90-nanometer process measuring 1 square micron. "You can get a 40 to 50 percent increase in clock speed with no further improvements" says Intel director Mark Bohr."

4 of 187 comments (clear)

  1. Intel culture by BiggerIsBetter · · Score: 4, Insightful

    What a beautifully telling Intel quote that is, "You can get a 40 to 50 percent increase in clock speed with no further improvements". Just keep ramping it up boys.

    --
    Forget thrust, drag, lift and weight. Airplanes fly because of money.
  2. Moore's Law by worst_name_ever · · Score: 4, Insightful
    In keeping with Moore's Law

    Well, more like "keeping Moore's Law a self-fulfilling prediction for yet another generation of processors". ;)

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    In Soviet Rush, today's Tom Sawyer gets high on you.
  3. I have no doubt they can do it..... by Selecter · · Score: 4, Insightful
    But it seems to me to be rather premature announcement, supposing these chips will be out when Intel says they will be. I think Intel is starting to feel the heat from quarters they didnt expect, like AMD and Apple via the good graces of IBM. Athlon 64 looks like a winner and so does the IBM made G5. IBM and AMD both have great looking roadmaps for the future.

    This smells like a another smear piece by Intel to me, kinda like paper launching the P4 Emergency Edition on AMD's rollout day for the Athlon 64.

    Boo. Hiss.

    1. Re:I have no doubt they can do it..... by Selecter · · Score: 4, Insightful
      I thinks it's premature to build a few test SDRAM cells and then magically announce they are going to build chips using that tech in possibly less than 1 year and 1 month. It's far more likely they will not meet that target, given the real hurdles of fully implementing that process to overcome. A few SDRAM cells does not a P5(6?) make.

      Also, someone is not telling the truth.

      "The 65-nanometer chips will not include the IBM-touted silicon-on-insulator technology, either. "We have not seen any significant performance advantages with SOI," Bohr said."

      Well, who is it? IBM and AMD are going with it. Who's wrong, Intel or IBM/AMD? I'd like to know.