Slashdot Mirror


Open Source Finally Hits Real Silicon

pagercam2 writes "While Open Source software has many success stories, hardware and particularly chips haven't had as much. While there have been multiple Open Source projects, none have come to a final product until now. The OpenRISC 1000 has been implemented by Flextronics Semiconductor(a division of Flextronics, the contract manufacturer possibly best known for its production of many Cisco products) along with PCI, 10/100 Ethernet, serial, GPIO etc. ... Details and pretty pictures available at OpenCores.org, and it even runs uClinux. Good Job!"

12 of 247 comments (clear)

  1. So what's Sparc V? by AKAImBatman · · Score: 4, Informative

    So what's Sparc V? Swiss Cheese? Sparc specs have been available for a LONG time.

    1. Re:So what's Sparc V? by AKAImBatman · · Score: 5, Informative

      Have open-source cores been available to implement those specs been available for a LONG time?

      For quite awhile, as I understand. The Leon chip is an example of this. Other areas such as Fujitsu's processors and set top devices have been based on Sparc.

      I'm not saying that OpenCores is a bad thing. I'm just refuting this "we were here first" bullshit.

    2. Re:So what's Sparc V? by annodomini · · Score: 5, Informative
      Um, it's an open standard (by some definition), not open source.

      From the SPARC website:

      Any version of the SPARC Instruction Set can be licensed from SPARC International, and then used to design processors implementing that open standard. Truly - in letter and in spirit, SPARC's open - for business!
      Hell, it doesn't even look like much of an open standard. You need to license the instruction set in order to be able to implement it. This is like saying UNIX is open source, since anyone can implement POSIX and license the UNIX trademark, and because a lot of people have licensed the source code. That's not open source; it may be an open standard (although I'd argue that in order to be an open standard, you can't restrict who implements it with licensing agreements). So really, SPARC is in no way open source, and I wouldn't even consider it an open standard.

      OpenCores, on the other hand, is really open source. You get the full design of the entire chip; you could just produce the chip by sending the CAD files to a chip fab and having them produce it. All of the Verilog/VHDL/etc. are open and freely available for you to use and modify. Even if you license the SPARC ISA, you still have to design the chip yourself.

      Hell, there are plenty of ISA's that you can license. The IA32 architecture is implemented by Intel, AMD, Transmeta, and others. PowerPC is implemented by IBM and Motorola. MIPS chips are produced by lots of people. Open ISA's are a dime a dozen. What's important about OpenCores is that the full chip design is completely open.

  2. Good job but not quite by downix · · Score: 4, Informative

    This is indeed a good step for the Opencores project, but the subject itself is misleading.

    The LGPL'd SPARC-compatible processor Leon was put to silicon a long while ago.

    Give credit where credit is due, the Leon tracked over this territory years before OpenRISC.

    --
    Karma Whoring for Fun and Profit.
  3. Flextronics Xbox by doctor_no · · Score: 5, Informative

    >>Flextronics Semiconductor(a division of Flextronics, the contract manufacturer possibly best known for its production of many Cisco products).

    Flextronics would actually be best known for being the main manufacter of the Microsoft Xbox.

    http://www.wired.com/wired/archive/9.11/flex.htm l

  4. homepage: by gimpboy · · Score: 4, Informative

    Project: OpenRISC 1000

    Silicon Implementations

    Several companies are making silicon implementations (ASICs) of OR1200 using different library vendors and foundaries, process geometries from 0.35um to 0.13um. For references contact lampret@opencores.org.

    Here is an example of System-On-Chip (SOC) from Flextronics Semiconductor. It is a 32-bit general-purpose microcontroller implemented on UMC 0.18um targetting embedded applications with maximum clock frequency of 160MHz. The SOC features:

    * OR1200 processor
    * Memory Controller (FLASH, SDRAM, SRAM, DPRAM)
    * PCI 2.2 32-bit interface 33/66MHz
    * Ethernet MAC 10/100
    * UART16550
    * GPIO
    * JTAG/Debug Interface

    The OR1200 is implemented with 8KB instruction and 8KB data caches, I/DMMU with 64 TLB entries each, power management unit, debug unit, tick timer and interrupt controller. Its 32x32 multiplier is coupled with a 64-bit MAC unit.

    Test board for testing the SOC has 64MBytes of SDRAM, 32MBytes of FLASH, RS232 transceiver, Ethernet 10/100 PHY. Connectors are for RS232, Ethernet, JTAG/Debug and several Mictor logic analyzer connectors. The board has its own DC/DC regulators for 3.3V IO power supply and 1.8V core power supply. It can be used as stand alone board or as PCI standard form plugin board.

    Software running on the SOC is Embedded Microcontroller Linux (uClinux) with a console on serial RS232. The console shows a network ping to a local network host - the ping shows the Ethernet 10/100 capability.

    This board was the first prototype built (not fully assembled at the time)
    Dynamic power of the entire test board is 1.4W. Dynamic current of the SOC IO power supply is 52mA (3.3V) and dynamic current of the SOC Core power supply is 86mA (1.8V). These are nominal values measured at 100MHz system clock.

    Maximum system clock frequency of the SOC is 160 MHz. System clock is used to clock not only the OR1200 processor but the entire chip (exception is memory controller which can also run at 1/2 system clock). Max system clock 160MHz was obtained at 25C ambient temperature, 3.3V IO and 1.8V core.

    Test boards are available to Flextronics Semiconductor ASIC customers. For more information about the test boards, the SOC technical details and business engagement please contact Flextronics Semiconductor.

    IMPORTANT NOTE: For a live demonstration of the SOC in Silicon Valley, California during Dec 8th 2003 and Dec 15th please contact Damjan Lampret.

    --
    -- john
  5. /.'ed already by Chas · · Score: 4, Informative
    Here's the Google Cache:

    Project: OpenRISC 1000

    Silicon Implementations

    Several companies are making silicon implementations (ASICs) of OR1200 using different library vendors and foundaries, process geometries from 0.35um to 0.13um. For references contact lampret@opencores.org.

    Here is an example of System-On-Chip (SOC) from Flextronics Semiconductor. It is a 32-bit general-purpose microcontroller implemented on UMC 0.18um targetting embedded applications with maximum clock frequency of 160MHz.

    The SOC features:

    • OR1200 processor
    • Memory Controller (FLASH, SDRAM, SRAM, DPRAM)
    • PCI 2.2 32-bit interface 33/66MHz
    • Ethernet MAC 10/100
    • UART16550
    • GPIO
    • JTAG/Debug Interface

    The OR1200 is implemented with 8KB instruction and 8KB data caches, I/DMMU with 64 TLB entries each, power management unit, debug unit, tick timer and interrupt controller. Its 32x32 multiplier is coupled with a 64-bit MAC unit.

    Test board for testing the SOC has 64MBytes of SDRAM, 32MBytes of FLASH, RS232 transceiver, Ethernet 10/100 PHY. Connectors are for RS232, Ethernet, JTAG/Debug and several Mictor logic analyzer connectors. The board has its own DC/DC regulators for 3.3V IO power supply and 1.8V core power supply. It can be used as stand alone board or as PCI standard form plugin board. Software running on the SOC is Embedded Microcontroller Linux (uClinux) with a console on serial RS232. The console shows a network ping to a local network host - the ping shows the Ethernet 10/100 capability.

    This board was the first prototype built (not fully assembled at the time)

    Dynamic power of the entire test board is 1.4W. Dynamic current of the SOC IO power supply is 52mA (3.3V) and dynamic current of the SOC Core power supply is 86mA (1.8V). These are nominal values measured at 100MHz system clock. Maximum system clock frequency of the SOC is 160 MHz. System clock is used to clock not only the OR1200 processor but the entire chip (exception is memory controller which can also run at 1/2 system clock). Max system clock 160MHz was obtained at 25C ambient temperature, 3.3V IO and 1.8V core.

    Test boards are available to Flextronics Semiconductor ASIC customers. For more information about the test boards, the SOC technical details and business engagement please contact Flextronics Semiconductor. IMPORTANT NOTE: For a live demonstration of the SOC in Silicon Valley, California during Dec 8th 2003 and Dec 15th please contact Damjan Lampret.

    --


    Chas - The one, the only.
    THANK GOD!!!
  6. Re:Whats the point........ by Anonymous Coward · · Score: 5, Informative

    "Can anyone seriously point out some practical applications of this processor?"

    Sure.

    For chips derived from this test SoC:

    MP3player
    VoIP hard phone
    Network Router
    Firewall
    Wireless Access Point
    DVD player
    Car stereo
    Cell Phone
    PDA

    For uClinux:

    It's all around you, many of the products _you_ use every day run it. Just because you think Linux means servers and desktops doesn't mean that's the only place it's widely deployed!

    J

  7. Re:Almost Used in iPod by gwernol · · Score: 4, Informative

    Just FYI, this guy's a troll. Check out his recent posts. Apparently he's also "in middle management at Honda". I highly doubt Apple are considering OpenRISC for the iPod.

    Bad troll. Bad.

    --
    Sailing over the event horizon
  8. Re:So what's the point? by Jennifer+E.+Elaan · · Score: 3, Informative
    Yes, many of us do. Companies like MOSIS will fab silicon cheaply, and for those who are truly poor, Xilinx FPGA's can suffice quite nicely. And designing a chip isn't that difficult. I have an implemenation of a small 32-bit stack-based CPU targetted to a Xilinx FPGA around here somewhere.

    I'm currently designing a tiny Single Board Computer (Z80-based) for embedded control applications. Sure, the specs aren't that impressive (a couple MHz, 32K RAM, 512K flash), but that's not the point. The thing is designed to fit on a robot and run on batteries.

    Open hardware designs are still about geeky people doing fun things.

  9. Re:Open Source Chipsets by twiddlingbits · · Score: 5, Informative

    Sure it could be done, up to and including the design verification using chip simulations, but actually making the chips and debugging the silicon process could get very expensive. I'm sure you could find a foundry in Taiwan or China to produce it, but would there be a market for it so you could get back all those startup costs? Do you know of some folks who have a few hundred K to invest against AMD, Intel, Motorola and IBM for a tiny slice of the market? Hardware has a lot of startup costs than software to get it to market. It's not like compiling the new code for your kernal fix. Maybe if it was specialized and optimized for embedded applications it might have a shot. I guess you could call it the "Penguin" chip since I'm assuming it would be optimized for Linux.

  10. FPGA rules for sure by mr.Spike+(edd+sonic) · · Score: 3, Informative

    This is the future, i was shizoiding about in posts time ago.
    I use Xilinx FPGAs, which are both cheap and super powerful. For the company, i am woring for, i am developing digital signal poccessing processors and software for them using FPGA. one twenty dollar FPGA can process extremely high-order filters and analyzers on samplerates as high as hundred MHz, which we use for microwave communication in extremely baad environments.


    With my addiction to open sources i am on developing a open-hardware computer (for a long time already)and will put online all sources, schematics, cerbers, layouts, so any Geeky guy (or Woman -- Jennifer E. Elaan? sorry if i am wrong) will be able to put together one, or buy components and ask somebody who can.


    You would say You might need license for buying FPGAs used in by militaries for missle targeting (yes!) - then You would would be right. However there are no problem to by those in russia or anywhere else without having any license.


    So hold on for a home-brew computer era coming back (from the times we were assembling Sinclair ZX Spectrums 16k and 48k at our homes:). How those computers will reincarnate from tv-calculators to plaforms being able to "process" (remove:) macrovizions, copyright bits on multiple streams, as well as directly capture satellite broadcast and process it.


    Only drawback is that it will be with its own OS - BrainOS i am working on at te time. Just because it will be programmed not in sequential language, but parralel (VHDL) as it will be embedded in hardware (however modifiable by user at any time -- fpga!). We should be ready about that we could not (legally:) build any x86 on it, as we will have no license from intel. But i don't miss them. For running old x86 software and games we can use old x86 computers, which are widely available in trashmarkets.



    asap i will try to do some artickle on this and try to post it there, that we could discuss what is ood and what is not).. Leave me some personal message if You are interested in it, so i could see how many of us are interested in this project. I hope it to be the same as linux is for software world, it could be for hardware world.