Intel to Dump Pentium 4 in Favor of Pentium M
Opinion writes "According to The Register, Intel is to dump its Pentium 4 plans in favour of the new Pentium M architecture. The scrapped Tejas and Jayhawk processors represented Intel's next-gen 90nm P4 CPUs, due to arrive in 2005."
The more laptops out there, the more important are power saving CPUs. Pentium-M's are a good step in the right direction after the P4 90nm debacle.
Even in the server market, cutting on power consumption is getting more and more important. If you have a park of 1000+ machines in a data center, power consumption matters.
cpghost at Cordula's Web.
iirc, the Pentium M was designed at Intel's Israeli division, so this makes some sense compared to the old Washington/Oregon naming scheme.
There is more on The Inq here:
http://www.theinquirer.net/?article=15760/ www.theinquirer.net/?article=15768
http://www.theinquirer.net/?article=15749
http:/
And more coming soon, this story is far from over.
-Charlie
Disclaimer: I write for The Inq, but I did not do these stories.
Wow. This is amazing. The P6 (PPro, PII, PIII) architecture is coming back to the desktop. This does make pretty good sense. The P6 has high IPC, and by applying some Pentium 4 tricks (Quad-pumped FSB, longer pipeline), this can make for a killer CPU. For more information, check out this Ars Technica Article on the Pentium-M's P6 heritage. The chip doesn't even lie about it - its CPUID reports a P6 family CPU.
When are the processor companies goign to invest in the diamond wafers? - Diamond Age ;)
Now that will be a great way to get that processor speed up, and not worry about the silicon melting.
[Yes I expect this to be modded down for redundency]
I mod down so you can mod up. Your welcome.
Socket/Super 7 boards.... I recall having an MI, MII and a K6-2 350 in the same board.
Of course that would require both Intel and AMD to sit down and design some Socket1000 board or something. But that gets trickier cuz many of the pin [in Socket478 for instance] are grounds and power. IIRC there are 166 pins dedicated to power management. So the layout of the actual processor would be dictated somewhat by the location of power.
But it would be nice to be able to take out an Intel core and slap in an AMD core in the same motherboard...
Tom
Someday, I'll have a real sig.
The Athlon in a K7, Opteron and Athlon64 are K8, but AMD isn't calling it the Octathalon either.
Smaller fan sounding less than a big fan is all relative. To move the same amount of air in a given time, the small fan needs a far higher rpm, which increases noise.
Current breed of Pentium M's are pin-for-pin compatible with Socket 478 Pentium 4's, but appear to use a different type of GTL+ signalling. I guess that Intel will release a Pentium M version for LGA 778 (the new socket).
Finally, Intel realises that some long pipeline design with zero decent hardware rotation (up to Prescott), requiring huge cache and big clockspeed isn't that good.
Actually, the Pentium M is NOT a new architecture it is a Pentium III all dressed up for war. More or less it is a P3 with the P4's branch prediction unit, an ever so slightly longer pipeline, and a few other niceties from more modern processor designs.
m -1.html for a somewhat technical discussion...
See: http://arstechnica.com/cpu/004/pentium-m/pentium-
The Pentium M is based on the same P6 core as the Pentium Pro through the Pentium III.
The really interesting part about this story is that Intel is going from their seventh generation architecture (Pentium 4) back to their sixth generation architecture (Pentium Pro/II/III/M).
We all knew this Pentium 4 thing would go nowhere.. :) except for the millions and millions of dollars it got Intel. Now they're trying to gracefully back out. It seems like a sound technical decision. I say good for them.
There are four different approaches to handle several cores.
...have your software being aware of multiple cores and use a multithreaded approach. So calculations can be split into different treads and those dispatched to different cores.
;) ), if the application doesn't use multiple threads.
a) Tread them like different processors. This requires you to use either an SMP capable operating system (virtually all Unices, Windows NT Series Server edition) to fully leverage the advantages, or...
(Operating system level)
b)
(Application level)
c) Have your compiler optimize the software for parallel execution of instruction during the compile process. That means for instance to try to fit operations together in a way that two consecutive operations don't depend on each other.
(Compiler level)
d) In the prefetch queue of the processor check for interdependencies between operations. If two operations are independent of each other you can put them into different cores and execute them in parallel.
(super scalar processor)
Those four approaches are more or less coupled together.
a) is a special case of b), if you call the operation system a special application which governs all other applications. If your computer is supposed to run only a singlethreaded application at a time, then having an SMP operating system doesn't really speed up your work (ok... printing in background works better
On the other hand having no SMP aware operating systems means that one core gets most of the work because it runs all processes. Even multicore aware programs are started on the first processor and only dispatch certain threads to the other cores.
c) and d) are also tightly coupled. If the compiler is able to optimize the code in a way that successive operations are independent of each other, then a multi core processor is better able to keep all cores working in parallel.
b) and c) are somewhat intertwined, because redesigning software to take advantage of a multi threaded model means also that you have to loose the dependance of different operations in your program and to design your algorithms in a way that most of it can be executed in parallel.
So as a conclusion: You will probably notice a speed advantage by going multicore from the beginning, because some of the conditions are already meet. A processor can dispatch operations to different cores even though the software may not be optimized for that. So a slight increase of speed is to expect even from very old software. As you add newer software to your computer and update your operation system, other speed ups will be possible.
About 5GHz is the upper limit for processors running on EXPERIMENTAL technology available currently. The Pentium-M performs as well as the P4, but at MUCH lower clock speeds, which also means lower heat.
The long pipelines allow higher clock speeds (shorter paths for current to flow down) at the expense of Instructions Per Clock (for a very rough estimate of the efficiency of a CPU, multiply clock speed * IPC).
Not smaller fans, slower fans. A smaller fan runnign the same RPM as a large fan will move less aire with the same amount of noise, a large fan can move the same amount of air at much smaller RPMs than the small fan, and in doing so generate less noise. My case has 1 120mm fan and 1 92mm fan, it probably pushes the same amount of air as my friends setup which has 4 80mm case fans, but with substantially less noise.
"Sic Semper Tyrannosaurus Rex."
I was trying to avoid getting into things like subthreshold leakage current (to explain why Vdd can't be reduced arbitrarily).
That's what I get for posting ten minutes after I wake up I guess.
actually, no. Moore's law has been misquoted and misused in so many places it is a shame.
The cost is not factored in to moore's law. The law pertains to chips with the lowest per-component cost. It has nothing to do with the ratio of cost to transister count.
IPC = Instructions Per Cycle. Its the amount of work a CPU can do in a clock cycle. (The higher the IPC, the more efficent the processor, which is how AMD's processors can do the same amount of work with a lower clock speed)
He probably had a Tandy 2000, AFAIK the only PC using an 80186. I have seen it described at "TRS 80 model 2000" in some places.