Intel Shrinks Transistor Size By 30%
pinkUZI writes "Intel will announce that it has crammed 500 million transistors on to a single memory chip, shrinking them in size by 30%. " The tech details are sadly lacking in the article - but I'm sure those will follow. Indeed, the Yahoo piece gives the details that "...has created a fully functional 70 megabit memory chip with transistor switches measuring just 35 nanometers."
I'm waiting for Intel to reduce heat output by 30%. 130 watts for a top end P4 is pretty insane, when a top end Opteron is only 100 watts. I don't care how small it is.
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I work for Intel, and I gotta say--we do this every couple of years, and this wasn't a particularly stunning or unexpected part of our roadmap. If you wanted a more sensationalist headline for a pretty expected bit of news you might try the old "Intel Proves Moore's Law Not Dead Yet"
This sounds like a great way to tackle heat and power problems with laptops (and PCs, it's not like modern PCs don't have heating trouble too). I'd lay a bet though, that it'll still run hotter than the P4s, it seems there should be an addenium to Moores law.
It's for a memory chip... when was the last time you had a memory chip that produced a noticeable amount of heat? (Hint: Rambus.) When was the last time you had a memory chip that produced an unacceptable amount of heat? (Well, if you're stretching, some of the SRAM's that HP used for caches in the PA-RISC boxes...)
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Moore predicted his Law would run out in 2012 when 1 billion transistors are fit on a chip. Looks like we're ahead of schedule.
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From the article:
For its next generation chips, Intel said it incorporated new materials and other technologies to work around the problems.
Wow, what a helpful and descriptive statement. The quality of this article is disgusting. Why even post it?
They could just say "Clock gating".
I love it when a technical group has to talk to non technical jurnalists who report to other technical groups. Something gets lost in the middle step.
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This is Intel's 65 nanometer process announcement. Right now, they are at 90 nanometers. They always test the process using SRAM cells. This doesn't mean that Intel won't use the process for CPUs and what not.
But as a rule of thumb, the closer you bunch up the transistors, the higher the electrical leakage. This is why the current chips are consuming more power than ever. At 65 nanometers, we'll be 30 percent smaller but also leak 30 percent more. This leakage causes heat.
Intel's paperwork shows that they believe that practical transistors will stop shrinking at approximately 320 watts/cm^2 which is nearing the heat density of a nuclear reactor (500w/cm^2). This will take place at the 45nm level in 2007.
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May I ask why, every time they shrink the size of components, they feel a need to put more on the chip? I realize more can be done, but with all the heat/power problems with increased density, why not use the space with chip power you already have? The result would be a cooler, lower power device.
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Narrower gates are less good at being the perfect insulators they should be. The thinner dielectric allows more leakage current, and can even break completely if the voltage is too high
I think your describing the wrong mechanism - deep submicron device leakage is dominated by drain-source subthreshold currents (hot-electron effects and whatnot), not by gate-source currents.
is one thing. Producing it on the Production Line is another.
This is why there are Chemical Engineers, as opposed to Chemists. Or Mechanical Engineers, as opposed to Physicists. You can produce a single one at a cost of $10,000 in the lab, and that is an achievement.
But there's another step, and it very quickly leaves the realm of a controlled environment...
What a bold move, predicting the end of Moore's law.
Yawn.
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Intel shrinks the number of commands of the x86 architecture by 30% thus resulting in less heat and a global saving of energy of multiple gigawatts per month.