AMD to Demo '8-socket' Dual-Core Opteron System
flynn_nrg writes "AMD will make the first public demonstration of a system built out of its dual-core processors today, the result of a strategy first made public almost a year ago. Two-core Opteron chips aren't due to ship until the middle of 2005, but AMD will have four of parts running inside an HP ProLiant DL585 server at its Austin plant later today."
I didn't see any specifics in the article, so I was wondering if anyone knows how fast the Dual-core Athlon 64's and Opteron's will be running? Has there been any clue's? I'm just wondering how long my processor will seem fast for, lol..
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but AMD will have four of parts running inside an HP ProLiant DL585 server at its Austin plant later today.
Does this mean HP is offically ditching the Itanium2? If so, strange move, albeit likely a smart one...
While it will be a while before I will be able to justify one of these at home. I am happy for any technology that will further lower the price of processors. Maybe a nice AMD64 will be in the future of budget home users.
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Given the cothermic limitation on implementing 'cores' (or independent dies) on one surface, it seems a clever but limited hack to increase the performance by effectively implementing multiple CPUs on the same chip.
Of course, in my experience, AMD64s are fairly cool compared to Intel's stuff. You could porbably do a dual core AMD64 at 2Ghz for way under 100W.
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And just think, it was only last week when it was shown that most servers are never upgraded (Core Components), and that most people already buy their servers with growth in mind.
This kind of stupid comments are not helpful.
My question is this, how is this going to affect M$ licencing of OSes? I buy a dual socketed board and put in a couple of these babies is M$ going to complain that I have 4 CPUs and XP won't load because I have the 2 CPU version?
The idea of licencing software by HW is stupid, don't you think?
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From what has been published prior, the maximum number of coherent HyperTransport links in one Socket 940 interface is 3 and the number of logical processors has been limited to 8 to keep cache snooping traffic managable. Because each dual core chip will have 2 independent caches, the coherency traffic will increase regardless of whether external dual cores are addressed as single HT units. Will this result in either: a) reduction of sockets for general-purpose servers to 4 or b) entirely new ccNUMA protocols being developed from previous generation Opterons?
OS loaders and schedulers can help keep chatty processes allocated to the right mem/processor, but something more has to be said about hardware-level coherency standards. The X-box was fast and efficient largely because its CPU used the video RAM natively, but PCs still have to slog data over the slow and non-coherent PCI, AGP, or PCI-Express busses between the CPUs and GPUs. An inter-vendor standard could bring PC CPU-GPU interaction efficiencies much higher. ccPCI-Express or HyperTransportx16 slots anyone?