Ah, here is the link to what I had read. Wikipedia is getting better all the time, but I sometimes wonder if it will lead us into a knowledge monoculture.
Most plastics lose clarity and become brittle under UV exposure. Focusing a UV beam, even if only at a miniscule power, at such a small track width seems to introduce a whole slew of new problems. I've heard that Blu-ray will be the last generation of plastic-substrate optical disks unless better UV resistant materials can be developed.
Has to be the most hellish place on the surface of the earth. Dante's Inferno does in fact have the very heart of hell full of darkness and ice, in fact. A more miserable condition than any volcanic brimstone, I'd say.
There is only so much bandwidth on a copper line. The split is made because most end consumers just downloaded content, with very little traffic needed to send HTTP requests, emails, or IMs. However, P2P makes the lopsidedness much more acute nowadays.
Re:Nope, wrong, invalid.. nothing to see here.
on
The End of Encryption?
·
· Score: 5, Insightful
What you say is very true, but there are two big exceptions to note: 1) 1TP/QKE require as much storage/bandwidth for the key as for the message, and the key can never be resused. These are both severe drawbacks. 2) Crypto is useful for more than just hiding information. Digital signatures/integrity hashes are both very important and impossible to achieve -reuseably- with either of the schemes mentioned above.
True, there is not a hard limit of 8 cores for an Opteron system, but that limit does seem to apply to -glueless- systems. I have not yet seen an Opteron system with greater than 8 cores without extra logic processors for inter-chip communication. The recently announced Newisis systems (16 and 32 core) use clusters of 4 CPUs. Furthermore, the AMD presentation for multi-core Opterons only mentions 2- and 4- way systems. This is not good news for AMD.
And yes, I do admit the HT is not a physical spec nor does the committee plan to develop one. I just wish that they would. It makes no sense to make a socket interface spec since CPUs have different power pin needs (and number of HT connections for that matter) and chipsets have an arbitrary number of pins to peripherals. However, a slot interface would make perfect sense if you wanted to treat select devices like GPUs as peers to the CPU, cutting latency and increasing effective bandwidth to them. PCI-Express was designed explicitly to cut the number of pins/traces needed for a device, and in that regard, HT is not quite as efficient.
The PC industry tends to have cheap hardware and relatively pricey integral software ($300 for XP Pro non-upgrade, MS Office even more) while Apple, being a singluar source, can subsidize its software development with hardware sales. People scoff at the yearly $150 OSX upgrades, but I can assure you that without $2k starting model towers and pricey iPods, it would be a lot worse. I do not own any Apple hardware, but I would love one of the new 30" displays if nVidia or ATI would release a consumer-level PC-based 2xdual link graphics card. (These monitors are one area where they are probably not making off too much like bandits...)
From what has been published prior, the maximum number of coherent HyperTransport links in one Socket 940 interface is 3 and the number of logical processors has been limited to 8 to keep cache snooping traffic managable. Because each dual core chip will have 2 independent caches, the coherency traffic will increase regardless of whether external dual cores are addressed as single HT units. Will this result in either: a) reduction of sockets for general-purpose servers to 4 or b) entirely new ccNUMA protocols being developed from previous generation Opterons?
OS loaders and schedulers can help keep chatty processes allocated to the right mem/processor, but something more has to be said about hardware-level coherency standards. The X-box was fast and efficient largely because its CPU used the video RAM natively, but PCs still have to slog data over the slow and non-coherent PCI, AGP, or PCI-Express busses between the CPUs and GPUs. An inter-vendor standard could bring PC CPU-GPU interaction efficiencies much higher. ccPCI-Express or HyperTransportx16 slots anyone?
Err, the point of atomicity w/ journaling in a heirarchical system is that if you lose power during a write, it is data to which no parent i-node or directory points. The data being created or altered is written first, then its updated directory, and then its parent directory on up to the root. Or you have one journal level, where the file is written to journal and then the journal entry is copied over the original location. If power dies when the journal is being written, data is lost but the FS maintains integrity, or if the power goes during the copy, the journal exist. Atomicity means that a transaction either happens all the way or not at all, and Reiser4 does guarantee this. In-flight data can be lost so long as partially written data does not leave the system or some other API-level atomic transaction partially completed.
... China wants control of future standards. They would rather sell razor blades than handles. Until they actually produce a substantial volume of actual content, they can't do much, however. If the government were to forbit the manufacture of foreign designs to eliminate imposed royalties, manufacture would just resume in India, and China would just have their own proprietary standard. See stories over the lsat year regarding the Chinese optical media standard, the spat over wireless protocols, etc.
This is pretty cool, but what is really the minimum possible size for a Bluetooth device? Could one really fit into a earplug sized device. In high school I had to do a lot of memorized poetry recitation for English classes and fantacized about such a thing.:)
Here. It's a long read, but even in skimming you can get far more detail than any Fox or CNN report. In fact, find more detail than the government or media really wants you to know at: http://www.supremecourtus.gov/. The relevant link ('Recent Decisions') is near the top just above the pretty picture of the courthouse itself.
FW Upgrades for non-router 802.11x equipment?
on
IEEE Approves 802.11i
·
· Score: 2, Interesting
My router claims to be firmware-upgradeable to 802.11i/AES 'when the time comes,' but what about other stuff? If given the option, I would a sufficiently upgradeable AP or wireless NIC. It seems that only routers have enough CPU horsepower to spare to do be indefinitely upgradeable, but could I be wrong?
This is roughly 1/100 the circumference of the earth. (and who would really want to shoot more than half of that but still suborbital anyway, right?) Most of the world's population and industry is within 250 miles of deep sea, so this is rather effective anti-ground artillery. Anyone who the U.S. could conceivably face off against squarely in a naval battle (Russia or China?) would still only attack its fleet with long-range, transsonic cruise missiles, potentailly nuclear. Of course, the conventional logic is that if the U.S. military claims distances of 250 miles, it will probably be something like 400 in reality.
People usually scoff at the IDE vs. SCSI question nowadays, but for running a server, the underlying issue of 'consumer level' versus 'server level' drives remains. Server drives are designed to be left spinning for extremely long durations without failure while most PC drives are optimized for fast spin-up on boot. What you want to investigate is mean failure times, guaranteed spin-up-use-spin-down cycles, -Heat and Sound Output-, seek times, and sustained throughput. Good SATA drives are reasonably cheap, 0/1/0+1 SATA RAID controllers are becoming relatively common on motherboards, and SATA RAID5 controllers are getting more common and cheaper. RAID5 is obviously the way to go for 3+ drives if you can spare the US$200-$300 for a card.
The Colossi were not programmable (they just did precisely one thing rather well), so it may be hard to consider them computers in all possible senses. Konrad Zuse's Z3 (Wikipedia Link) was also completed two years prior and was Turing complete, so it's hard to really give Colossus any credit other than the impact it had on the war.
Sorry, but it's No eXecute, not No Read. NX can only prevent execution of code not intended to be executed (stack or data space), not prevent the reading of memory space of a program. NX should be appreciated solely on the grounds that it steals a great deal of Palladium's thunder, postponing that nightmare a little further.
Let us not forget that nVidia and ATI both produce chipsets. Multiple graphics card purchases per system would be a dream for them, and they can help in a direct manner. Although there are not many (read as 'maybe a dozen worldwide') boards with dual AGP, the PCI-Express standard will lead to much easier multi-GPU setups. Also, the newest ATI chipsets with embedded GPUs support multi-monitor if an ATI card is used in the empty AGP slot, so you know that these guys already have to have agendas for PEG in mind.
Slashdot Mirror
1) IBM has opened up Cell, royalty-free.
2) Apple will never let MacOS run on an open platform/commodity hardware again.
3) AMD has virtually no non-x86 CPU tech.
I predict that Intel will either manufacture a Cell derivative or a big-endian, possibly non-x86 propreitary CPU and chipset.
Ah, here is the link to what I had read. Wikipedia is getting better all the time, but I sometimes wonder if it will lead us into a knowledge monoculture.
Most plastics lose clarity and become brittle under UV exposure. Focusing a UV beam, even if only at a miniscule power, at such a small track width seems to introduce a whole slew of new problems. I've heard that Blu-ray will be the last generation of plastic-substrate optical disks unless better UV resistant materials can be developed.
Doesn't carbon dioxide sublime/deposit at that temp? I was under the impression that is didn't exist as a liquid at atmospheric pressure.
Has to be the most hellish place on the surface of the earth. Dante's Inferno does in fact have the very heart of hell full of darkness and ice, in fact. A more miserable condition than any volcanic brimstone, I'd say.
There is only so much bandwidth on a copper line. The split is made because most end consumers just downloaded content, with very little traffic needed to send HTTP requests, emails, or IMs. However, P2P makes the lopsidedness much more acute nowadays.
What you say is very true, but there are two big exceptions to note:
1) 1TP/QKE require as much storage/bandwidth for the key as for the message, and the key can never be resused. These are both severe drawbacks.
2) Crypto is useful for more than just hiding information. Digital signatures/integrity hashes are both very important and impossible to achieve -reuseably- with either of the schemes mentioned above.
True, there is not a hard limit of 8 cores for an Opteron system, but that limit does seem to apply to -glueless- systems. I have not yet seen an Opteron system with greater than 8 cores without extra logic processors for inter-chip communication. The recently announced Newisis systems (16 and 32 core) use clusters of 4 CPUs. Furthermore, the AMD presentation for multi-core Opterons only mentions 2- and 4- way systems. This is not good news for AMD.
And yes, I do admit the HT is not a physical spec nor does the committee plan to develop one. I just wish that they would. It makes no sense to make a socket interface spec since CPUs have different power pin needs (and number of HT connections for that matter) and chipsets have an arbitrary number of pins to peripherals. However, a slot interface would make perfect sense if you wanted to treat select devices like GPUs as peers to the CPU, cutting latency and increasing effective bandwidth to them. PCI-Express was designed explicitly to cut the number of pins/traces needed for a device, and in that regard, HT is not quite as efficient.
The PC industry tends to have cheap hardware and relatively pricey integral software ($300 for XP Pro non-upgrade, MS Office even more) while Apple, being a singluar source, can subsidize its software development with hardware sales. People scoff at the yearly $150 OSX upgrades, but I can assure you that without $2k starting model towers and pricey iPods, it would be a lot worse.
I do not own any Apple hardware, but I would love one of the new 30" displays if nVidia or ATI would release a consumer-level PC-based 2xdual link graphics card. (These monitors are one area where they are probably not making off too much like bandits...)
From what has been published prior, the maximum number of coherent HyperTransport links in one Socket 940 interface is 3 and the number of logical processors has been limited to 8 to keep cache snooping traffic managable. Because each dual core chip will have 2 independent caches, the coherency traffic will increase regardless of whether external dual cores are addressed as single HT units. Will this result in either: a) reduction of sockets for general-purpose servers to 4 or b) entirely new ccNUMA protocols being developed from previous generation Opterons?
OS loaders and schedulers can help keep chatty processes allocated to the right mem/processor, but something more has to be said about hardware-level coherency standards. The X-box was fast and efficient largely because its CPU used the video RAM natively, but PCs still have to slog data over the slow and non-coherent PCI, AGP, or PCI-Express busses between the CPUs and GPUs. An inter-vendor standard could bring PC CPU-GPU interaction efficiencies much higher. ccPCI-Express or HyperTransportx16 slots anyone?
Argh. Busted again for posting half-asleep. Or just a bad subliminal pun?
here.
Not a list, but has a good portion of the books and actually gives inciteful commentary.
Relevant presentation overviews here and here.
Here.
Err, the point of atomicity w/ journaling in a heirarchical system is that if you lose power during a write, it is data to which no parent i-node or directory points. The data being created or altered is written first, then its updated directory, and then its parent directory on up to the root. Or you have one journal level, where the file is written to journal and then the journal entry is copied over the original location. If power dies when the journal is being written, data is lost but the FS maintains integrity, or if the power goes during the copy, the journal exist. Atomicity means that a transaction either happens all the way or not at all, and Reiser4 does guarantee this. In-flight data can be lost so long as partially written data does not leave the system or some other API-level atomic transaction partially completed.
... China wants control of future standards. They would rather sell razor blades than handles. Until they actually produce a substantial volume of actual content, they can't do much, however. If the government were to forbit the manufacture of foreign designs to eliminate imposed royalties, manufacture would just resume in India, and China would just have their own proprietary standard. See stories over the lsat year regarding the Chinese optical media standard, the spat over wireless protocols, etc.
I hope that you meant you didn't mean to be a pedant, but maybe your humor escapes me. ;)
This is pretty cool, but what is really the minimum possible size for a Bluetooth device? Could one really fit into a earplug sized device. In high school I had to do a lot of memorized poetry recitation for English classes and fantacized about such a thing. :)
Here. It's a long read, but even in skimming you can get far more detail than any Fox or CNN report. In fact, find more detail than the government or media really wants you to know at: http://www.supremecourtus.gov/. The relevant link ('Recent Decisions') is near the top just above the pretty picture of the courthouse itself.
My router claims to be firmware-upgradeable to 802.11i/AES 'when the time comes,' but what about other stuff? If given the option, I would a sufficiently upgradeable AP or wireless NIC. It seems that only routers have enough CPU horsepower to spare to do be indefinitely upgradeable, but could I be wrong?
This is roughly 1/100 the circumference of the earth. (and who would really want to shoot more than half of that but still suborbital anyway, right?) Most of the world's population and industry is within 250 miles of deep sea, so this is rather effective anti-ground artillery. Anyone who the U.S. could conceivably face off against squarely in a naval battle (Russia or China?) would still only attack its fleet with long-range, transsonic cruise missiles, potentailly nuclear. Of course, the conventional logic is that if the U.S. military claims distances of 250 miles, it will probably be something like 400 in reality.
People usually scoff at the IDE vs. SCSI question nowadays, but for running a server, the underlying issue of 'consumer level' versus 'server level' drives remains. Server drives are designed to be left spinning for extremely long durations without failure while most PC drives are optimized for fast spin-up on boot. What you want to investigate is mean failure times, guaranteed spin-up-use-spin-down cycles, -Heat and Sound Output-, seek times, and sustained throughput. Good SATA drives are reasonably cheap, 0/1/0+1 SATA RAID controllers are becoming relatively common on motherboards, and SATA RAID5 controllers are getting more common and cheaper. RAID5 is obviously the way to go for 3+ drives if you can spare the US$200-$300 for a card.
The Colossi were not programmable (they just did precisely one thing rather well), so it may be hard to consider them computers in all possible senses. Konrad Zuse's Z3 (Wikipedia Link) was also completed two years prior and was Turing complete, so it's hard to really give Colossus any credit other than the impact it had on the war.
Sorry, but it's No eXecute, not No Read. NX can only prevent execution of code not intended to be executed (stack or data space), not prevent the reading of memory space of a program. NX should be appreciated solely on the grounds that it steals a great deal of Palladium's thunder, postponing that nightmare a little further.
Let us not forget that nVidia and ATI both produce chipsets. Multiple graphics card purchases per system would be a dream for them, and they can help in a direct manner. Although there are not many (read as 'maybe a dozen worldwide') boards with dual AGP, the PCI-Express standard will lead to much easier multi-GPU setups. Also, the newest ATI chipsets with embedded GPUs support multi-monitor if an ATI card is used in the empty AGP slot, so you know that these guys already have to have agendas for PEG in mind.