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Samsung Demos Future Memory Chips
Fletcher points to this story in CNET Asia, excerpting "The Korean electronics giant unveiled an 8-gigabit flash memory chip Monday based on the 60-nanometer process, as well as a 2-gigabit DDR DRAM chip based on the 80-nanometer process. Flash chips, which retain data after a host computer is turned off, are used in flash cards and cell phones, while DDR DRAM is used inside PCs."
Generally ram/storage sizes on-die are given as bit sizes, and have been for a very long time. No, it doesn't indicate a data rate.
#include "disclaimer.h"
People tend to get excited about new products like these; in a separate but equally relevant phenomenon, they tend not to RTFA.
From the article:
Both chips, however, are prototypes. Companies just began this year to make chips on the 90-nanometer process. (The nanometer measurement refers to average feature sizes on the chips). Eighty-nanometer chips may not come for at least another year, and 65-nanometer chips won't debut until at least the end of 2005.
In other words, 16GB flash MP3 players will not be available in time for Xmas.
I want to drag this out as long as possible. Bring me my protractor.
"Flash chips, which retain data after a host computer is turned off, are used in flash cards and cell phones, while DDR DRAM is used inside PCs."
This being Slashdot and all, one wouldn't think that needed to be said. =)
How soon to get 8 gigabytes, so we can put the original DVD? Probably 3 years.
One gigabit is 128MB. Assuming a 64-bit memory bus width, one chip per bus bit, and 2 gigabits of storage per chip, you're talking about a 16GB DIMM.
So the the terminology inclined, it is a significant advancement.
A good summary of memory technology is here.
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Memory chips are most often rated in bits, it has been that way for decades, I think. Even the RAM sticks you buy have chips that are often rated in bits. Only when it is assembled into a memory module or card does the byte term get used to describe its capacity. Few end users use the bare chips so confusing the consumer isn't a concern..
256megabit doesn't mean a rate, but the fact that it has 256 million bit cells.
Many people probably have more RAM than they need. However, certain operating systems tend to expand their needs to meet or exceed typical RAM configurations. Additionally, many of us in research really benefit from increased RAM, although you do need a 64-bit architecture before you can access more than 4 Gibibytes of it. For example, if you're doing large simulations, you benefit greatly from being able to keep everything in memory and not having to read/write to the hard drive.
Ben Hocking
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Actually, increasing the RAM reduces the significance of other bottlenecks in a PC.
For example, you can buffer transfers that would otherwise go to or from the hard drive, so you spend less time waiting on I/O.
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I think that Flash RAM has limitations as to the number of times it can be rewritten . . . the number of possible rewrites is high (10's of thousands or more), but a swapspace in a hard disk would eventually read/write flash RAM into oblivion . . .
The manufacturers of the actual silicon will always use *bit for the size because they are developing something independant of architecture, and therefore *bit is the most relevant notation of size. On a PC it might be relevant to use 'quads' as a measurement, as all machine code and addressing is done in 32 bits, whereas on some older microcontrollers the addressing is in 4 bits, so that would be nibbles. Perhaps some technologies want single-bit accessability, as the storage is not used to store addresses/instructions/ASCII. Using *bit is the only truly platform independant measurement, because the 8-bit bytes is aribtary whilst the bit is indivisible.
#include "disclaimer.h"
Could you point out where I can find a 256 MB RAM chip? I don't mean a ram stick with 8 or more ram chips, I mean just one ram chip.
Ditto for the flash memory chips. Can't seem to find any 1GB flash chips (again not the drive, just the chip).
They are using conventional storage standards. Memory chips have been measured in (multiples of) bits for decades. When I started paying attention, around 1980 or so, the state of the art was something like 4k or 16k bits for DRAM and those chips were 1-bit wide. Even 8-bit wide chips were, and still are, quoted with storage capacity in bits. Again from the early days, an EEPROM with 2048 words of 8-bits each was described as a 16k device.
Further down in the article it is stated that "The flash chip is designed to let consumer electronics designers put up to 16 gigabytes of data on a single memory card". Note that they use the conventional units, bytes, for memory cards.
Remember, different conventions in different fields. You may think its silly, but that's life and you'd better get used to it.
And, since you ask: no, bits doesn't necessarily imply a rate connectivity. Raw connections are usually rated in bits per second but high level data streams, such as ftp download speeds, are often quoted in bytes per second. I do not know whether there is a parallel here between comms and storage in the different conventions used to specify what the raw technology gives you and what is built out of that technology. I would be interested to learn whether it is more than coincidence.
Paul
Lasciate ogne speranza, voi ch'intrate
I notice that DRAM prices, for the same technology, have stayed at their 2001 price level at $100 to $150 per gigabyte. During the same period flash memory has fallen from $300 per gigabyte to $80. I like to look for "odometer threshholds" when prices drop the next factor of ten (about every every five years). For example, hard disk fell below $1 / GB in 2003 and flash $100 / GB in 2004.
I did read recently there was some price fixing in the DRAM market.
First off, storage chip capacity is always measured in bits, and these chips are most likely (no, I haven't read the FA) 8Gib (eight gibibit, or 8x2^30 bits, i.e. 2^30 bytes or 1GiB). Look at your memory sticks and you will notice that they are equipped with mutliple memory chips, and the same goes for large capacity flash cards. This is not a 1GiB storage card, but a component that can be used to build large storage cards.
What is new and interesting (for chip process nerds) about this is the 60nm process. Current chips are generally produced in a 130nm process. There are also 90nm chips in general production, and they're pretty much the shitnitz at the moment.
...ceterum censeo Carthaginem esse delendam.
You might just be in luck, for this very day I read an article about a Korean electronics giant unveiling a 2-gigabit DDR DRAM chip based on the 80-nanometer process.
Now if only I could remember where I saw that article...
A pizza of radius z and thickness a has a volume of pi z z a
Won't more ram eventually become unnecessary with all the bottlenecks computers have?
No... err... rather, something will fundamentally change.
Instead of having a hierarchy of memory (hard drive, ram, cache, etc), you'll see RAM and flash merge into a "universal memory". Everything will come on a single chip - processor and storage. RAM won't be required since the on board storage will be both quick and nonvolatile.
Currently, as much as 75 percent of a processor's area is used for cache memory. This is a number that is increasing, too. This is because RAM is too electrically "distant" from the main processor to be of any high-performance use. The near-term solution has been to pile on lots of cache memory in order to make up for it.
Recently, Ovonyx licensed their phase-change technology to Nanochip. Now, the phase-change technology is the same thing that is currently used in CD/DVD-RWs. With this implementation, they'll be programming and reading the material electronically instead of optically. Since they'll be doing it with MEMS and atomic probes, the density will reach levels of 1 terabit/square inch (125 gigabytes) and will do so very quickly. For more information, see HP's probe storage page. As a side note, HP and Nanochip are just a couple miles apart so it is rumored that Nanochip is hiding the HP plan at this point. Commercialization in 2006 isn't too far off. Also note that Microsoft is an investor in Nanochip as well. Bill Gates mentioned at Cebit that terabit chips will be here "very soon". Something to think about.
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....in a more/bigger/faster and more throw away culture. I'm impressed! But it's also depressing! How is that? Well, tell ya, this is like the horsepower wars out of Detroit in the 60's, more cubes and higher revs with higher compression. Ok as far as it went, but........it meant throw away cars, too.
Tell ya whut I would be more impressed with technologically, if some RAM company wants to make a splash and show off some real branez. A smart and adaptive memory chip reader that you could stick in a ram slot like a daughtercard that you could then insert any mix or match multiple RAM sticks into and it would read and access and use them all.
We are awash in so called "obsolete" RAM that is still functional. It used to be just a coupla decades ago we threw away stuff when it was broken. Now we throw away perfectly fine stuff, things that aren't broken, they are just "obsolete" although they might only be a few years old.
Anyone see anything potentially wrong there? Same thing with CPUs. We have SMP mobos (and kernels), how about NON-SMP MO mobos, any braniacs got any examples of that, were you can mix and match older processors and keep using them? I know you can make a cluster whatsis with older boxes, I am talking a single machine that you could add tons of older oddball ram sticks to and plug in a variety of CPUs.
To me, RAM and CPUs should be treated like drives and other peripherals, you should be able to daisy chain them better (different kinds, sizes, functions, etc) on a single machine.
Actually, there are plenty of reasons to measure bandwidth in bits not bytes.
When I size/plan/order circuits, I need to know raw throughput in bits/sec, because I may be ordering that circuit for a dedicated purpose, which can have significantly different overhead and efficiency than a different purpose.
Whenever you see bandwidth measured in Bps (bytes per second) you are seeing, at best, an estimate. The reason is that people are concerned about *payload* when you mention bytes, not raw throughput.
As overheard increases or decreases per packet (which can be caused by fragmentation, poor application design, etc), then the amount of payload data per packet changes, while the raw throughput does not. Try this as an exercise. Open up an FTP sire via MSIE, and transfer a large file from a decent server near you. Note how long it takes, and the data rate MSIE tells you that it comes in at. Now, open up an MS command prompt, and ftp to that same site, get the same file, and note how long it takes, and the data rate it tells you.
Same site, same link, same file, same OS...two completely different download times/rates.
When I order any circuit...I want to know what the actual bit rate of the line is. I don't want some marketing mumbo-jumbo about 'bytes per second'...I may not even use an 8 bit byte, or, they may use a different interpretation of 'kilo' and 'mega' when quoting data rates. Bit-rate is pure...because a bit is a bit is a bit, and a second is a second is a second.
A single chip stores single Bytes. A DIM or SIM is a smal plate with 8 or more chips.
On a chip you can address every bit individually, or chunks of 4 or 8 bits, depending on your fetch and cash strategy.
However on a DIM/SIM you fetch from all chips one bit each, and those get combined to a byte, or a word or a long word, depending on your architechture and the architectue of the chip/DIM.
The logic on the DIM/SIM is responsible for combining bits from different chips to the words, the processor wants.
Depending on usage of he chip, I mean planned usage, the ship might be organized in arbitrary word sizes. A common word size on a chip can e.g. be 128 bit for video ram.
All the above is "principle" only. Today I guess it is far more complicated.
angel'o'sphere
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The type of NAND Flash currently in use require just a single transistor to store two bits, either by the mirror-bit technology or by multilevel flash. A single NAND flash cell is 4F (F=smallest featuresize of the technology node). So it takes 2F to store one bit. Current DRAM cell sizes are 8F (or 6F with additional area sacrifice). Therefore the flash memory density is at least four times as high.
In addition to that flash is MUCH easier to produce than dram.