Cell Workstations in 2005
yerdaddie writes "The cell processor will be introduced in graphics workstations before release in the Playstation 3, according to press releases by IBM and Sony. As previously discussed, IBM will be releasing more details in February 2005. However, apparently prototype workstations have already been "powered-on" and will be available in 2005. Since Windows on PPC was scrapped back in 1997, this leads to speculation that perhaps Linux, AIX, or BSD will be the operating system for cell workstations."
Sounds more like some kind of multi-core processor where the number of cores can vary greatly.
This article provides some background.
The graphic
Nothing to see here
No. You are mistaken. Xbox will have a PowerPC derivative. Not a POWER derivative. Also, I should note that Cell, although part is derived from the POWER4, is not really anything like the POWER4 architecture.
ruby -le"32.times{|y|print' '*(31-y),(0..y).map{|x|~y&x>0?'
The stated goal is for some future playstation (maybe the fourth generation) to use the cell processor and yes, to cooperate with cell devices in televisions, dvd players, et cetera. If we end up with cell PCs they'll be candidates too. They could run linux, of course. To be honest, that's the Xbox, if it were clustering, and it could have been if there were any reason for it to be. Sony will probably use some kind of IEE1394 (i.Link in Sony's parlance) possibly including 800Mbps in order to connect Cell devices. 1394 allows significant cable lengths and near-gigabit speeds today; it is intended to support 1.6Gbps and later even 3.2Gbps (over fiber.)
"You're right," Fisheye says. "I should have set it on 'whip' or 'chop.'"
All POWER-processors have been fully compliant (32 and 64 bit) PowerPCs since POWER3, and before that the RS64-procesosrs were too fully PowerPC compliant. So.. you are wrong in saying that most POWER-processors isn't PowerPCs since they have been since 1999, and they have been even more PowerPCs than "clean" PowerPCs since they until the 970 didn't have the full 64 bit ISA.
:)
The ISSCC papers state that Cell is Power based, not POWER based. There's a significant difference here since IBM in its marketing use the "Power" moniker to encompass both PowerPC and POWER processors. If you have seen different papers than I have, please provide me with an URL of PDF that proves me wrong. This is important stuff
- Henrik
- when the Shadows descend -
In essence Cell is just that, but it doesn't stay there. Cell technology can distribute it's load to other Cell processosrs nearby. It's built from the ground up to use grid technology transparently. Quite revolutionairy.
- Henrik
- when the Shadows descend -
Actually, CELL is based around the 970. Expect about 80-90% performance compared to an equivalently clocked 970. Where it goes nuts is that there's a number of vector units attached that are basically "VMX on steroids" to quote one of the main guys at IBM behind this. The vector units (or Data Plane Processors as they're calling them) can also communicate between each other as well as with the central core. The workstations are actually headless server blades, each of which will have 2 CELL's on them and they'll be running Linux.
This stuff isn't bullshit, it was all disclosed Thursday at the Australian Game Developers Conference. I didn't sign a NDA so it's all good. I also fondled a PSP =]
Cell workstations will be 8-way tipically, which many programs (like GCC) is able to use. If claims of Power5/Cell performance are true, it means that it will compile linux kernel under 5 sec. (8-way). All system, including KDE/GNOME and standard set of apps will take less then hour. Sounds too cool to be true.
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The primary goal of IBM with regards to the Cell processor was that it be scalable first as a rack mounted solution. Therefore the Cell Processor Workstation (CPW) will be available first up as individual form factor boards, containing a CPP, several DPPs and other small components for I/O etc.
I don't know.
/.'ers (it's NOT swap file aka pretend memory), IBM is resposible for that. Could you imagine designing a modern OS and it's applications without that little nicety?
But here is something to think about:
IBM is the absolute king of machine virtualization and hardware abstraction nowadays.
Even though the concept of Virtual Memory is probably over the head of most modern
IBM has been running OSes in virtualized hardware enviroments of maybe 30 years now, they got stuff that makes VMWare look like silly putty.
If you need a example look at how a modern ZSeries can run dozens of different operating systems in proccessing partitions at very very close to speed you get running them on native hardware.
Whatever it will end up doing, to the application/OS designer a 8 cpu cell machine will seem to be almost exactly the same as a 32 cpu cell machine, except that the 32 cell machine would be significantly faster.
And don't forget that the Cell CPU setup is not going to be like a x86 SMP setup, you can have something like 8 individual cpu's on one core, also cpu's could be tailored for specific things... Like some cores would be specificly for floating point operations, others would be very good integer math stuff...
Although probably to get the most out of the archetecture you'd have to use multithreaded apps, which introduce their own overhead and programming difficulties.
Nothing's official just yet, but this is WAY more interesting than studying for finals, so here we go:
Processor instructions are broken into an 'apulet', which contains data as well as code to perform an operation. This is probably why its claimed that if more processing power is needed, then its a simple task to add a new workstation and the work can be offloaded.
A cursory read suggests that its like creating a cluster of highly efficient yet simple nodes.
Corrections are welcome.
Reference: EETimes
I don't think NT supported any big-endian platforms. Even on PowerPC it ran in little-endian mode. Porting to a new platform was not quite a straight recompile, but it did only require porting the HAL, not the entire system. OS X works in a similar way - the Mach microkernel is used as a HAL (which is how NeXTStep ran on so many architectures with such relative ease).
Since it is the core of the current and future lines of windows, the windows base should be portable to a cell based system, basically it requires some new drivers and probably tweaking of the HAL abit
Unfortunately, since NT 3.5, Microsoft have been moving things closer to the kernel for speed reasons (meanwhile, everyone else has been moving things out of the kernel for stability reasons).
I suspect that processor independence is one of the major reasons why Microsoft are plugging .NET so much[1] (and delaying Longhorn). .NET code is CPU-independent, and so can easily be run on a new architecture. By encouraging people to start developing .NET code now, they probably hope that it will be possible to emulate any legacy x86 code at a reasonable speed on whatever chip the user happens to have (note that they recently bought the company that makes a very good x86 emulator for PowerPC). I would not be surprised if Longhorn ships on Itanium and PowerPC and comes with a transparent x86 emulator (as MacOS did for 68k code).
[1] Don't forget that .NET was conceived at about the time Intel were saying Itanium is the future and that x86 is going to die soon.
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It's not the same. Hyper threading divides processor units (e.g. a multiplier or an adder) in order to keep most units of the single core busy. This happens because Intel processors have very long processing pipelines (thus the very high frequency compared to AMD), so stalling them can be quite costly. In order to avoid this, Intel simply keeps track of two "virtual" processor states, essentially 2 copies of all registers, and schedules instructions from any of these two execution threads in ways that keep most units busy. By chosing from 2 threads instead of one it has greater chances of finding an instruction that can be computed by an idle (at that time) unit.
Cell architecture, on the other hand, seems to rely on multiple simple cores, each of which is complete. A central Power processor core keeps them working together. I assume (but I do not know!) that the benefit of this architecture is : (a) adding multiple cores is easy and increases cost linearly (b) software that works for a 16-core chip will also work for a 2-core chip, but slower (therefore the same processor can be adapted to different needs, just like multi-unit videocards, without expensive redesign) (c) an inherent understanding of parallelism (on the chip) allows chaining them together in an easy fashion. Maybe we will start counting cores instead of MHz in a few years, when all cpus will have peaked at some--obscenely high--MHz limit. Details on the cell chip are very vague and ridden with marketing buzz-words, but it appears it will be able to execute many more parallel threads than an Intel HT processor (2 threads maximum in parallel).
What worries me most is the fact that Sony (which also sells music/movies etc) says it'll have on-chip capability to protect copyrighted works. I don't know what this will mean for the GNU/linux crowd.
Disclaimer: All the above is wild speculation. I am not an engineer.
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Actually, they didn't. Windows XP comes with several HALs out of the box:
"Standard PC", Non-ACPI PIC HAL (Hal.dll)
"MPS Uniprocessor PC", Non-ACPI APIC UP HAL (Halapic.dll)
"MPS Multiprocessor PC", Non-ACPI APIC MP HAL (Halmps.dll)
"Advanced Configuration and Power Interface (ACPI) PC", ACPI PIC HAL (Halacpi.dll)
"ACPI Uniprocessor PC", ACPI APIC UP HAL (Halaacpi.dll)
"ACPI Multiprocessor PC", ACPI APIC MP HAL (Halmacpi.dll)
Q: "Why do sound techs say 'check 1, 2'?"
A: "Cause if they could count any higher they'd be lighting techs."
Technological Features for "first-generation" Cell chips:
4.6Ghz Clock Speed
1.3V operation
85 degree C operation with heatsink
6.4Gb/s off chip communication
from the article:
eight cores on a single chip
90nm SOI process
Link to Powerpoint
Link to Original Article in Japanese
Just so we are clear, Power4 is a PowerPC chip, so I'm not sure exactly what distinction you are making...
According to
m l
http://www.linuxinsider.com/story/34994.html
longhorn is not going to run on the cell chip:
"Microsoft's software can't take x86 beyond some minor hyperthreading on two cores without major reworking -- and Itanium simply doesn't cut it. The Wintel oligopoly could spring a surprise -- a multicore CPU made up from the Risc-like core at Xeon's heart, along with a completely rewritten Longhorn kernel to use it. But no one has reported them stuffing this rabbit into their hat. So, for now at least, they seem pretty much dead ended."
This article predicts that the cell chip will replace x86 as the main platform for Linux.
http://www.linuxinsider.com/perl/story/34707.ht