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Strained Silicon to Perpetuate Moore's Law
An anonymous reader noted a story floating around about a new technology known as strained silicon (or maybe 'Stained' since the article calls it both ;) which AMD & IBM figure will make CPUs 24% faster. A little bit on how it works as well, but not much substance.
Is avaible from http://www.theregister.com/2004/12/13/ibm_strained _silicon/ and http://news.com.com/IBM%2C+AMD+claim+a+better+way+ to+strain+silicon/2100-1006_3-5487544.html?part=rs s&tag=5487544&subj=news.1006.5
Strained Si methods have been around for awhile. The PowerPC 970FX uses it, for example.
This method (called DSL, or "dual stress liner", not only stretches
the NFETs, it compresses the PFETs.
See a better article here.
Also, IBM is awesome.
24% does not perpetuate moores law.
If you overclock any CPU by 24% it'll be strained.
Or charred
I have been a user for about 10 years. This ends Feb 2014. The site's been ruined. I'm off. Dice, FU
The germanium is removed to help improve power consumption even further and lower core temps. This is where the IBM and Intel process differ. Intel does not remove the doping material from the wafers, and well... We see how that has affected their CPUs at 90 NM.
The new process only dopes the silicon under certain types of ICs and not others..
Actually Zdnet described it better so I'll just quote them
If anything this will finally allow for a G5 Powerbook and a
I hope you die painfully and alone.
This technique will allow transistors to react 24% faster. That doesn't neccesarily translate into faster cpus. For example, if this makes transistors run hotter, they will have to lower density. Furthermore, Intel already uses a version of this.
It's strained silicon which gets it's name from stretching the silicon.
n edsilicon/
http://www.intel.com/labs/features/si12031.htm
http://www.research.ibm.com/resources/press/strai
Religion and science are both 90% crap..but that doesn't negate the other 10%.
The time it takes for a signal to propagate down a wire is now much more important than it used to be.
A 24% increase in transistor speed is not going to instantly create a 24% faster processor.
Slow wires (relative to transistor speeds) will soon dominate.
It Really really makes me sad, to see CmdrTaco making a jab at someone elses spelling error...
Strained silicon is a great technology. you get 30% (or whatever) better electron mobility, which makes for faster capaciter discharge, and thus faster transister switching, and reduced heat generated in the process. However, you can't strain it much more than they already have. It bought the lithography folks another few hundred megahertz, but it's not going to keep moore's law alive for another couple decades, at least not by itself.
Strained silicon doesn't really address the two big problems facing silicon lithography: leakage current, and the ever rising costs of dynamic power costs. Even with strained silicon there are still hundreds of millions of capacitors, each charging and dischanrging billions of times a second. If the frequency increases by some number X and the number of caps increases by some number Y, you have to drop the charge on each cap by X*Y or the dynamic power usage goes up. Furthermore, leakage current, which used to contribute almost nothing to the energy needs of a CPU, now makes up a good percent of the electrical and heat budgets. The drains are just too close to the body. There are too few atoms of semiconductor to act as a resistor.
It's a nice one-time speed bump, but it does solve the hard problems, just puts them off for another year.
Alternating thin layers of different lattice constant materials can change the semiconductors properties, in particular, the bandgap. It is possible to turn Si into a direct-bandgap material (like GaAs) this way.
The problem in large scale mfg (back then) was eliminating crystaline defects.
The major Electronic Design Automation tool vendors today have yet to come up with effective ways on how to design with and verify very high gate densities devices on the digital side. If you think that 90nm is easy, ask Intel's Prescott core team on why they think 100W out of a processor is "normal". It's not just power, for example, but clock/power gating melding efficiently with the functional aspect of the design. Power analysis and signal integrity (i.e. crosstalk) design flows are only getting more and more complex, and more designs require respins to the tune of almost a million dollars per mask set.
Let's also not forget the analog world, since analog CMOS is notoriously difficult to design linearly across +/- 10% voltage ranges and through temperature and process variations. The problem was bad in 0.18um, very bad in 0.13um, awful now in 90nm and a nightmare in 65nm. All the secondary transistor effects that affect the usually "normal" operating points of logic gates only make things worse for the analog and mixed signal designers. This is not only for integrated analog and mixed signal interfaces but also for on-chip phase/delay lock loops and other assorted necessary goodies.
Nobody has the design expertise or the tools to effectively model all of these phenomena and get them working as efficiently as they'd like. In my experience, it's more of a hack and check mentality that is increasingly pervasive. Once you've stuffed so much analog and digital together, trying to functionally verify it to a particular degree of certainty is a major hassle. Data sets are getting astronomically larger, and simulations are still AFAIK not able to be multi-threaded, leaving you at the mercy of your computing power. Sure, you can use strained silicon and SOI to help you out, but you can't ignore the rest of the design issues because they will only get worse. This is where the EDA tool vendors like Cadence, Synopsys, Mentor Graphics and the rest of them need to come up with some more innovative ways of doing business. Otherwise, we'll have a lot of technology that is manufacturable but cannot be designed with.
There's nothing wrong with "Moore's Law".
As members of the science and engineering community, we understand that a Law is one of the highest designations we can give a phenomena. It implies that there exists consistent empirical evidence for the phenomena. Evolution and Relativity have far more evidence yet they are still theories.
What a load of utter rubbish. The reason some things are named 'laws' and some things are named 'theories' has absolutely nothing to do with the validity of them. Things were called 'laws' back in the 17th-19th century when a lot of people actually thought that they embodied some exact and final property of nature. None of them did.
The truth is, that most of the things called 'laws' are exactly like 'Moore's law': an ad-hoc mathematical description of an empirical observation.
Boyle's law, Hooke's law, Avogadro's law, Newton's law of gravity, Ohm's law, Arrhenius' law, and so on and so on. All of these laws were derived essentially the same way: By fitting a curve to experimental data.
Boyle and Avogadro didn't know what a gas was made up of. Arrhenius did not understand statistical thermodynamics, Newton did not understand gravity.
Now the theories you refer to, are something completely different in both rigor and how well the describe things. For instance the 'theory of relativity' is based on a set of basic postulates, from which the rest follows mathematically.
Einstein did not go out and measure the relationship of mass and speed and fit a curve to it. He made a few assumptions (some of which noone had dare make before) and worked out the physical consequences, arriving at something which just-so-happens to match reality far better than Newton's fitting-the-simplest-curve approach did.
Conventional processor speed it determined by the RC constants of its longest nets, not that much by the transistor speed. Your average FET can amplify signals in ~10 GHz range, and a bipolar -- GaAs, InP, SiGe -- transistor works just fine up to almost a 100 GHz, but it does NOT translate into digital processing clock speed much above 4 GHz, all due to wiring and its RC.
Paul B.