World's Thinnest Flash Memory Cell Unveiled

qorkfiend writes "Measuring a scant 20 nanometers across, Infineon AG's new nonvolatile flash memory cell could lead to 32 gigabit flash chips within the next few years. The cell contains a unique structure with a fin for the transistor to avoid nano-scale physical effects and uses 90% less electrons than today's memory to store data."

Comments

Real Solid State Computing

[Jozer99]

Wow, now there might be a practical inexpensive method for solid state servers.

iPod

[sh1ftay]

Cool, just in time for a flash based ipod.

Finally...

[deft]

One can carry both their MP3 AND pron collection.

This one guy I know can finally leave the house. I'll tell him.

Re:Finally...

[Anonymous Coward]

You, sir, just pre-empted 40 other people's post ideas. The angry mob will arrive any minute.

Increased susceptibility to quantum effects?

[EQ]

90% fewer electrons? Does this mean less resiliency/redundancy in the chip - how vulnerable is this to quantum effects - or simple radiation?

Re:Increased susceptibility to quantum effects?

[m50d]

It makes it more vulnerable to radiation, but ram is already checksummed for that. Wouldn't want to use it in space though.

Re:Increased susceptibility to quantum effects?

[big tex]

90% fewer electrons is all about conservation.

See, it's like recycling - you know, not depleting our natural electron supplies and screwing our grandchildren.

Re:Increased susceptibility to quantum effects?

[dsginter]

Does this mean less resiliency/redundancy in the chip?

Yes - this is the primary reason that Intel is moving to OUM after the 45nm node (slide #32). Do note that this is still years off. OUM is rad-hard.

Also note that the research which is poured into XY-addressable OUM/chalcogenide memory can be potentially useful for the seek and scan memory that is also mentioned in that Intel presentation. My guess is that they'll come out with at leaset one variation or possibly both. The chalgogenide material is the same stuff used for RW optical media - you can change the phase via the application of energy (electrical, optical or otherwise). The change in phase causes many of the properties of the material to change, delineating unique, detectable states.

The probe storage is similar to a CD-RW but, instead of spinning the media below a single optical read/write mechanism, they are moving the media beneath thousands of atomic resolution probes that read/write with electrical energy. It is quite the technology.

HP says to expect it by 2006. Wow!

Re:Increased susceptibility to quantum effects?

[Peepsalot]

Wouldn't want to use it in space though.

Good point, because as we all know: In space, no one can hear you blue-screen.

does this mean

[museumpeace]

90% less current and since power is
I-squared R
that REALLY cuts the power dissapation which his the brick wall most silicon vendors now approach?

Re:does this mean

[morcheeba]

The article said 90% less electrons, and true, electrons (or holes) make up current, but that's not what they meant. They said it was 90% less electrons stored in each cell -- This is just a small portion of the total current used in the memory.

An ampere of current is 6.24 * 10^18 electrons/second, so to write at 12 megabits/second (USB speed) would require only 1 billion electrons/second, or 0.173 nanoamps -- the rest of the chip will probably take milliamps and dwarf the actual number of electrons flowing into the cells.

Most of the current is used to combat the capacitance on the bit lines - since the X & Y grid wires are so close to other wires (protected by an insulator, of course), a natural capacitor forms. If you want to change the voltage on these bit lines quickly, the capacitance will demand current. You'll get the current back when you eventually try to remove the voltage, but so far it isn't really worth it to recover this current because, after resistive losses, it's at a slightly less voltage. (there are some cool schemes to pump that current into the next bitline to be accessed, but this happens more with synchronized clocks).

Power is also dissipated by the analog sense amplifiers at the edges of the FLASH memory that convert low-level voltages to more usable digital signals.

Power dissipation is more of a problem for processors & not FLASH memory. FLASH is all about density and cost.

replacement?

[phoric]

How about replacing a hard drive with flash chips for ultra-compact PCs? I know a lot of devices use this and some people boot linux off usb flash keys, but what about a built-in flash HD interface?

Re:replacement?

[databoing]

Well, see, the problem with that is that Flash Memory is great for reads, but writes tend to wear out the chip. Writes require a higher voltage to perform (1.5V compared to 0.2V, I think. That may be wrong, use google) and so use as a replacement HD tends to shorten the lifespan of the device to a few months.

Using a flash memory device as a storeage place for things unlikely to change frequently (bootable linux for troubleshooting, encryption keys, etc) doesn't do much for the wear-and-tear of the memory, though.

Re:replacement?

[m50d]

IIRC it's fine as long as you use a filesystem designed to deal with it, and don't use it for swap, logs etc. For storing your home stuff in it's fine, just have no swap and put /tmp and maybe /var on tmpfs.

This flash is so thin...

[Anonymous Coward]

...it can currently only store '1's. '0's are still too wide to fit.

90% less = 81% lesspower too?

[Transcendent]

Since there is 90% less electrons to move, then there would be 90% less current. Power is I^2R, so (.9I)^2R = 0.81P

Sounds very good for portable devices, although I doubt the power consumption of flash cards was that significant (compared to an LCD with a backlite).

Although, my pen drive does get pretty warm when I'm doing enough reading/writing to it, so maybe there will be a significant benefit.

To get rid of any confusion... bytes v bits

[Atmchicago]

They say 32 gigabit, not gigabyte. So if you divide 32 by 8, that makes for 4 gigabytes. At least, that's the way I understand bit-to-byte conversion.

Re:To get rid of any confusion... bytes v bits

[Artraze]

But those are cards, not chips. Most flash cards use 256MB chips, with two 512MB, and four for 1GB. The 4GB cards almost certainly use at least 4 chips, so cards with these newer ones could be over 16GB.

Re:Retro-trends.

[TheGavster]

You don't already have a big aluminum fin on there, to increase speed? If it weren't for that and these v-tech stickers, it would be unusably slow ...

Re:90% less = 81% lesspower too?

[Nitish]

If there is 90% less current, there is a 99% saving in Power, not 19%. The new current is 0.1I, so the new power is (0.1 I)^2 R = 0.01 I^2R
I'm not sure that 90% less electrons immediately leads to 90% less current, though. Everything else being equal, this is true, but perhaps other factors have changed as well.

by 2009 32gb should be the norm anyways

[davidwr]

1GB flash drives are already common, add 3 18-month periods to double 3 times over and we'll be at 8GB=32Gbits.

Unless this hits the market significantly sooner than mid-2009, it will have competition.

Wear distribution

[vlad_petric]

Current flash cards that are used for consumer electronic products employ controllers that do wear distribution. Without such controllers, the FAT filesystem would kill them really fast.

For "raw flash" a filesystem designed with wear distribution in mind is JFFS2.

And yeah, I concur with tmpfs for /tmp. I'd make it default for all distros.

Re:Not so Funny: China

[jericho4.0]

That's xenopobic fear-mongering if I ever heard it. China is quite capable of building a spy satellite without this technology. Or they might just send someone to vist the installations in question, it's still a free country, after all.

Why does such a large chunk of americia insist on seeing the spread of technology and prosperity as a threat? You can't stop progress.

The real point

[eadint]

While everyone is complaining about math issues and how gbit and gbyte relate i think the real point is RW speed, current flash chips have horrible RW speeds my 1 GB flash card takes almost 1/2 hor to download. so it would take 16 hours to get my data (photos) of a 32 Gbyt card that would make it compleatly impractical. i would prefere to see a card that has at least CDROM read transfer speeds. that would be something worth buying.

90% Fewer Electrons!

[0x0000]

Now there's a marketting phrase! Can we expect IC manufacturers to start publishing an "electron count" for their products? How many ways can that be spun into deceptive marketing .... "Well, Brand X claims they're using fewer electrons than we are, but they're not telling you about the anicillary effects that consume 27% more electrons than the Acme Electron Lite Reduced Electron Count (REC) model. The fact is, our revolutionary REC technology represents a quantum leap in facilitated innovation..."

smaller, faster, sooner

[Doc Ruby]

20nm across means 1cm^2 can hold 250B(illion) cells, each 1 bit. That's 32GB(yte) chips in a cm^2. I have a 1GB SD chip in my Treo's SDIO slot, which cost $67 today. A 32GB chip is only 5.7 times denser (in each planar dimension). In the other direction, a 32GB SD chip (similarly less dense in the same 32/5.7x scale) today costs $10, which includes the overhead of the rest of the package.

I'm not so jaded that I think 20nm isn't so small. These numbers really scream how tiny a scale in which we're already producing engineering commodities. I just think that we'll see an increase in Flash density, driven more by the exploding market and R&D money than by physical and engineering limits. 3D memory array packages are long overdue: how about taking that 1GB chip, and arraying its 200nm cells within a 32Kx32Kx0.5K array, a millimeter-thick sandwich of cells and address bus layers, for a 0.5TB chip? 4 of those in an SD package would make a great 2TB cell the size of a quarter-dollar coin. By the time the packaging is engineered, the tech discussed in this thread will have shrunk cell size by at worst half, so 8x0.5TB layered chips can not only offer 4TB, but the address busses can offer a hypercube (or higher-order) topology, for parallel accesses.

Then we can get really fancy. Dedicate 1% of the Flash cells among the busses to FPGA logic cells in 100-cell clusters. That tiny parallel machine is now potentially the fastest supercomputer on the planet. That path to a "hypernanocomputer" is purely evolutionary, in terms of IC fabrication. If that were say, Intel, IBM or Fujitsu's roadmap, we could be there within 5 years, maybe 2-3 years. C'mon, someone over at Infineon get to work and really impress us.