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Intel and AMD's 2005 Plans Revealed
Takemedown writes "There's a good article on CTZ that talks about Intel and AMD's plans. Intel, continuing on their 18-month chipset refresh rate, will introduce their Glenwood and Lakeport chipsets for the Smithfield dual core desktop microprocessor in 2005. The chipsets will support SATA II, Matrix RAID and a higher system bus speed for the new Pentium 4 name holder.
As far as Intel's dual core strategies are concerned, they will most likely bring their dual core additions by the very end of Q2 or Q3 this year, so for those waiting for these next generation chips are better off with a due upgrade. Secondly, if you are hoping for a noticeable performance gain in regular computing tasks are in for a disappointment. Dual core microprocessors are for those who like to do multitasking or work on multithreaded applications. For example, if you are gaming and burning a DVD at the same time, dual core chips will come in handy and will definitely give a smooth computing experience."
The real bottleneck for gaming these days is hard drive access. If you are burning a CD while you are playing a game, there is a good chance that the game will need to load something like textures while you are burning the CD (presumably from an ISO on your hard drive). On the other hand, with a 52X CD-R burning a full CD takes less than 3 minutes, so it won't kill your game. Unless you have two hard drives, in which case the above is irrelevant.
Burning a DVD is IO-bound given all the traffic on the PCI bus from the harddrive and to the DVD. Burning a DVD is not CPU-bound, so it doesn't seem like a dual core CPU would actually help that situation.
The reality is most of the server market is their Xeon line and the dual-core Xeons are currently planned for 2006 and maybe even later.
It's exactly the same as SMP, except for two things:
1) Far less 'glue' circuitry is required on the motherboard. This allows cheaper multi-processor systems.
2) Potentially, communication between the processors could be faster.
Mostly, though, the advantage will be social -- if a large fraction of systems have multiple processors, as they will soon, then more and more applications will be written to take advantage of them.
Thad Beier
I love Mondays. On a Monday, anything is possible.
Dual core shares a memory controller, whereas dual processors have seperate memory controllers. AMD's Athlon 64 and Opterons have memory controllers on die, and were originally designed to be dual core. What this means is now two cores on die with one memory controller, communicating through a crossbar (think SGI) architechture. On a side not, imagine where AMD would be if they scrapped 64-bit from the start and released the Athlon 64/Opteron as a dual core from the get go.
AMD is using a technology patented by IBM called SOI (Silicon on Insulator)... IBM is very unwilling to allow Intel to use this technology to solve their heat problems....
Tom's Hardware has some good information about thermal loss. Notice that an idle AMD Winchester (SOI Athlon 64) loses only 3.2 watts, while the more recent P4 chips are losing > 34 at idle.
This number changes at load to 30 watts for the Winchester and 100+ watts for the P4.
Looking back and comparing it to a P2-450 I once owned... the Winchester numbers are close.... and that machine had no fan (just a very large heatsink).
I'm not sure you could have a fully-loaded Winchester without at least some type of active cooling... but certainly the CFM required across a good heatsink would allow you for an almost silent fan.
Memory as in on-die cache... yes, RAM... no:
1) Core based processors have more internal/embedded synchronization built in, especially related to on chip caching. SMP relies more heavily on the O/S for maintaining concurrency.
2) Connection between processors is shorter and theoretically faster. The big gain here is that the MB components for SMP are all integrated on the CPU, so everything is simplified and compressed.
3) Cache in SMP is separate to each processor, core-processors share the cache between the processors. SMP must maintain cache concurrency... this the basis of threading headaches and this takes process cycles to do so. However, sharing the cache in a core processor is often a problem (Intel) if the cache isn't big enough. AMD currently does this better.
4) SMP means higher license costs for multiple processors, core based processors are considered one processing unit (at least to MS).
That last one tends to be the most important to alot of people.
Via has been offering very - if not the most - stable chipset drivers for Linux for ages. There were many occasions in the past when I specifically chose via chipset brand boards with amd cpus because good experience in the past with Linux. And I never had any bad experience. That doesn't mean I don't have and/or use other chipsets/boards/cpus with Linux on them, I do - but mostly @ work. It's just I never see much sane reason in arguing like I-went-intel-because-of-better-linux-drivers.
I am putting myself to the fullest possible use, which is all I can think that any conscious entity can ever hope to do.
Silent PC Review has a good review of the Zalman Reserator 1, the only product I know of that even comes close to qualifying. It's nearly silent, more or less easy to install (if you built your computer, you can put this together, but I wouldn't recommend it for my mom), and can cool even the hottest processors and videocards simultaneously. It is not cheap, however, at around $240 shipped. I just installed mine, and it's the quietest, coolest-looking computer cooling part I've bought in years. Unfortunately, there really isn't another silent/easy/cheap option available. Seems like it's a "pick any two of three" situation.
This can be achieved on a commodity single-core processor using pure software techniques. The technique is known as Error-Detection through Duplicated Instructions (EDDI), and is implemented as a compilation step between assmbly code generation and object file generation. Stanford has done a bunch of work on this at their Center for Reliable Computing. I don't have any links readily available, but I'm sure that if you Google on EDDI and the ARGOS project you'll find some good info.
Note that IIRC experiments at Stanford showed that when using EDDI on a modern super-scalar processor the EDDI instructions can take advantage of unused portions of the pipeline, resulting in a significant reduction in overhead. You might still experience a slight performance hit, but on the other hand you don't need to add a whole new processor or core.