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Branched Nanotubes Offer Smaller Transistors
Designadrug writes "Tiny tubes of carbon, crafted into the shape of a Y, could revolutionize the computer industry, suggests new research. The work has shown that Y-shaped carbon nanotubes are easily made and act as remarkably efficient electronic transistors - but the nanotransistors are just a few hundred millionths of a meter in size -roughly 100 times smaller than the components used in today's microprocessors."
Each time some expert's saying that Moore's Law is about to hit a barrier,
there is something going on like those promising nanotubes.
Another one for Moore against those doomsday preacher like this one:
http://news.zdnet.com/2100-9584_22-5112061.html
What if I have a really, really powerful microscope?
I never spellcheck and I freely admit it. Save your karma for more worthwhile "lol erorrs" replies
We're going to have a devil of a time soldering these things, not to mention fitting them with heatsinks...
A feeling of having made the same mistake before: Deja Foobar
Soon we'll have cell phones we can lose *100 times* as fast!
Looks like a Flux Capacitor to me.
> > >We don't need no steeekin'.....oh wait, my wife says we do.
This paper suggests that this sort of thing was being done 5 years ago.
From the paper:
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~ |rip/\/\aster /\/\onkey
decreasing the size of something doesn't increase the heat it produces, no. it makes it harder for said something to dissipate the heat, as it has less surface area. you might be overlooking the part of the blurb that said "are easily made and act as remarkably efficient electronic transistors". remarkably efficient almost implies that heat issues are decreased proportionally to the size. almost. so i'd be more inclined to guess that heat decreases by a factor of 100 before i'd say it increases.
Chuuch. Preach. Tabernacle.
In the near-term, we have to be able to sort CNTs by chirality and diameter much more accurately and cheaply than we can now - this is because the properties of CNTs change dramatically based on very slight variations in these properties.
/. people who have access to scientific journals and want more in depth information on this subect - you can take a look at these articles:
Once we can do that reasonably well, there are a few approaches that look promising. For
P. G. Collins, et al., Science, 292, 706 (2001)
P. G. Collins, M. C. Hersam, M. Arnold, R. Martel, and Ph. Avouris, Phys. Rev. Lett., 86, 3128 (2001).
J. A. Misewich, et al., Science, 300, 783 (2003)
So, uh, they are a few hundred millionths of a meter in size -- or to put it in clearer terms, a few tens of nanometers in size. That'd put them in the 30-60nm range. Intel's currently making chips on a 90nm process, and intends to start making them on a 65nm process by the end of the year.
That's not a 1/100x size improvement
Moore's Law *will* hit the barrier. You cannot make something out matter smaller then an atom.
Next step wont be evolutionary, but revolutionary. This is when we get into quantum computing.
Life is not for the lazy.
What you have to remember about heat is that electronics only get hot because they are never perfect conductors nor perfect insulators {though we can make nearer-perfect insulators than we can conductors}. A perfect conductor will never get hot, no matter how much current you put through it, because the voltage drop across it will be nil and power = voltage * current. Nor will a perfect insulator, because this time, the current through it will be nil.
..... hopefully a fuse.
CMOS is based around two transistors, a P-channel FET which goes conductive when the gate is driven low, and an N-channel FET which goes conductive when the gate is driven high. The P-FET is trying to pull the output high and the N-FET is trying to pull it low. Both the gates are joined together, and this is the input. This is a simple NOT gate.
For a NAND gate, where any input 0 will drive the output to a 1, we have several P-FETs in parallel trying to drive the output high, and so many N-FETs in series trying to drive the output low. Each P-FET gate joined to an N-FET gate is one input. When they are all high, all the N-FETs turn on allowing the output to go low; when any one is low, the chain of N-FETs is broken, one or more P-FETs turn on, and the output goes high. For a NOR gate, where any input 1 will drive the output to a 0, we put the Ns in parallel and the Ps in series. You can make AND gates from NAND+NOT, OR gates from NOR+NOT, and any other combination you like. In fact you really don't need both NAND and NOR, because you can make either one out of the other; but it turns out they're equally as easy to make as each other in CMOS {not like many other technologies}.
In an ideal world this would never dissipate any power, since the input cannot be high and low at the same time so only one of the transistors will ever be on. In practice what happens is that the gates act like capacitors which take a finite time to charge and discharge. They do not switch instantaneously from conductive to non-conductive. So one stops conducting while the other is starting to conduct, and for a brief instant while the inputs are changing state both transistors are conducting a little. It's not a dead short circuit of course, otherwise something would give way
Now every time something changes state, you get a little pulse of heat. Which is why fast processors need cooling. Additionally, to make sure that the logic gate output has changed state before the next clock pulse, you need to make the gate capacitances charge up quickly -- which means using a higher voltage than you could get away with at lower speeds. But 2x more volts means 2x more amps means 4x more watts.
Smaller transistors should have less gate capacitance, and so be capable of switching more quickly.
Je fume. Tu fumes. Nous fûmes!
*Sigh*
t orials/Scaling/scaling.html%5BUniversity of Minnesota, Mechanical engineering]
No. Decreasing the size of something -increases- the surface area compared to the volume of the object, increasing it's overall ability to dissipate heat.
http://www.me.umn.edu/education/courses/me5221/Tu
Get your physics straight.
Dateline 21st February 1953
Scientists today revealed the molecular structure of DNA. It is theorised that this may revolutionise medical research and forensic science (and posibly Apple Pie).
And I bet someone said back then all they've done is describe the molecule.
init 11 - for when you need that edge.
Yeah, but i still bet nothing switches data as warmly as vacuum tubes...... /me snickers, waits for it.
do() || do_not();
You've interpreted "a few hundred millionths of a meter" incorrectly. The correct way to do it is:
one hundred millionth of a meter = 1m/100,000,000 = 10nm
Not one hundred millionths of a meter = 100 * 1m/1,000,000 = 100um
This is a very good summary.
One additional factor that needs to be added, though, is that as MOSFET transistors scale towards smaller and smaller features, leakage current becomes a larger and larger problem. Basically, at extremely small sizes, quantum effects start to become significant, and electrons randomly tunnel from one end to the other.
The larger the leakage current, the more is lost to heat.
It remains to be seen how large a problem leakage current is with the new tube transistors. If it's not a big problem, then one of the major obstacles towards reducing feature size on integrated circuits will have been addressed.
Kythe
it would be nice if TFA had a few facts comparing these to current transistors. Just being "small" isnt good enough. Quite a few things have to also be in the right range to make them competitive, such as voltage swing, current gain, switching speed, reliability, feedthrough and feedback capacitance, and probably more. And it's a bit presumptuous for anybody to extrapolate these things along the same improvement curve as transistors and IC's.
... I'm all over nanotech - have myself been attending Foresight Institute meetings regularly for the last decade. BUT, since the early nineties I've seen dozens of research papers promising new types of transistors and thus far the problem seems to be mass manufacturing of any of these approaches. What works in the lab is one thing - making a commercial product is another. So, don't get your hopes up to 'upgrade' to a nanochip any time soon ;-)
Nevertheless, we're heading in the right direction - this type of research caters to the VC community which is already investing heavily into privately funded nanotech related companies. Heaven knows - here in the U.S. we desperately need this type of research, may it be academically or privately driven. China, Japan, Korea, India, etc.. are catching up quickly and we already lost the race in the biotech and genetic engineering department.
Two roads diverged in a wood, and I--
I took the one less traveled by,
And that has made all the difference.
threadeds blog
Now that you mentioned SCIAM.
There is an article in the august issue of Scientific American about magnetologic gates. This mentions that instead of making transistors smaller so you can put more of them in the same space. You could also try achieve the same functions using less elements.
magnetologic gates are based on the MRAM technology. With some modifications the designs for MRAM can be used to create logic gates that are much more efficient and powerfull then CMOS based transistors.
With only 1 magnetologic gate you could create a AND, OR, NOR or NAND function. with 2 gates you can create a XOR function with would require 8 to 14 CMOS transistors. The 'full adder', the most used unit in a processor used to add two binary inputs, can be created with only 3 gates instead of 16 CMOS transistors.
So using magnetologic gates you can achieve the same kind of processing power improvement without using smaller units.
These magnetologic gates have some other advantages. They are non-volatile so they remember/store the result of the last calculation performed and reading out this value does not delete the information. This means that the overall calculation can be performed faster and it also enables parallel or clockless execution of operations.
Magnetologic gates can be reprogrammed like FPGA's. But unlike FPGA's switching between different functionalities takes just billions of a second. This ability to morph (which is the main focus of this article) radically reduces the amount of transistors needed in a processor. Since all function are hardwired in a normal CMOS processor, at any given time only a few percent of the transistors are actually used. If you could change the function of your elements with every operation, you could perform the same scala of different funtions with just a few elements.
If this technology will progress it could bypass the miniaturization efforts.
"the progenitor was a simple integrated circuit with two transistors in 1958 ... [w]e are probably at the same stage with Y-junctions"
Intel debuted the 4004, the first commodity microprocessor chip, in 1971 with 2300 transistors. That's 13 years, during which we had a space race (and Minuteman missile program) to stimulate investment. Today we have $trillions in returns on chip investment as stimulus, as well as an existing investment/manufacturing/marketing infrastructure. As well as highly useful micron-scale chips and software for design. So perhaps we're looking at a breakthrough "nanoprocessor" sometime earlier than 2028.
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make install -not war
Senior figures in the Bush administration were in talks with scientists, to see if a way could be found to fit these "naked" transistors with trousers.