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Intel Developing Ultra-Low Power Chips
ErikPeterson wrote to mention a C|Net article discussing Intel's development of low-power chips for mobile applications. From the article: "The chipmaking giant announced on Monday a new technique that it said could help cut back on wasted battery power in cell phones and mobile devices by as much as 1,000 times current levels. Active computing accounts for only half the power Intel processors use. The other half is gobbled up by a leakage current in transistors that exists when a machine is in a low-level sleep state, Intel said. The new version of the company's 65-nanometer wafer-making process, internally known as P1265, is better than Intel's current process at helping prevent the extra power from being sapped from the battery, the chipmaker said. "
Power dissipated=heat. Hint: Both are measured in watts!
I've had enough abrasive sigs. Kittens are cute and fuzzy.
It's not that confusing. A current intel chip spends half it's power consumption on computing, and wastes the other half. This new process reduces that waste to 1/1000th of what it was -- if a chip used to consume 2 watts, 1 on computing, 1 on waste, now it will consume only 1.001 watts, 1 on computing, .001 on waste.
The "designed to consume a tenth of the power" is about a completely unrelated processor: the next generation of Pentium M is supposed to consume 1/10th the power it currently conusmes.
Score one for reading comprehension.
It's not just dissipation, either; there's also a problem with power connections. Modern chips operate at low voltages but still consume huge amounts of power, which means that they draw very high currents. Since future chips would supposedly have even lower voltages and even higher powers, their current requirements would get truly outrageous. At some point, the chips would get to the point that they'd need to use their whole surface to conduct in all the current they need, and I've heard that they'd reach that point before they got to the point of being impossible to cool. Cutting power consumption obviously attacks both excessive current and excessive heat simulataneously, so it's the smartest solution.
There's no point in questioning authority if you aren't going to listen to the answers.
The G3 in the iBook (an IBM 750FX or something like that) draws 6 watts at 900Mhz.
That's six.
The heat's not really coming from the CPU in an iBook. In fact, the fan barely comes on - only in the most extreme temperatures (say using the laptop on a soft durface like a sofa or a bed when the air tempertaure is up in the "Baghdad August" range).
So, this power "used for computing". Where does it go?
Ah, I finally understand your misunderstanding. When they say half the power goes to active computing and half to waste currently, they mean half of the power consumption occurs while your CPU is crunching numbers, and half while it's just idling.
In both cases, power is dissipated as heat. All they've done is something along the lines of turning the processor off when it's not actually crunching numbers.
They haven't magically done away with resistance, or anything like that.
Into heat as the charge is dumped to ground, generally. Basicly you charge up a cap to indicate a logical 1 (or zero, if you prefer). When you want to make it a zero, you dump the charge to ground and you lose the energy, increasing the local entropy.
There are designs and a few working prototypes that recycle some of that energy, but they are more complex than regular chips. Basicly the idea is that in a given processor you'll have a bunch of gates turning on and off at any given time, so you can save some power by dumping charges from gates going from 1 to 0 to gates going from 0 to 1. Its really a heck of a lot more complicated than that though.
The field is called reversable computingand has a lot of potential to reduce power requirements of logic devices.
In a CMOS chip, the power consumption is a function of two major items: The leakage current, and the switching current. The leakage current is a function of the operating voltage and the device geometry size. Going smaller and lower voltage has increased the leakage current to the point where it's a roadblock to further development, so Intel is now apparently addressing it... that's good. The switching current comes about because the CMOS logic state for any node is controlled by either a transistor connecting the node to the supply rail, or a different transistor connecting that node to the ground rail. When the node is switched from one rail to the other, there is a brief period where both transistors partially conduct, and the current goes up dramatically. Hence, the more switching that goes on, the more rapidly, the more current is used, and that's the "power used for computing". The switching current is reduced by, among other things, lowering the operating voltage, which puts it at odds with the reduction of leakage current.
Less is more.
An article from The Register from this morning, also covering the new process.
P1265 =
12-inch silicon wafer
65-nm process
No, heat (or energy) is measured in J (Joules) or BTUs. Power is measured in W (Watts). Power = Energy / Time.
Okay, a little chip power management 101.
First, chip power can roughly be divided into two components:
1) Switching - When the transistor is going from high to low, or low to high
2) Leakage - When the transistor is "off" but still letting through a little current
Since CMOS was first put into play, two transistors per state have made things as low power as possible. The line between power and ground is controlled by two opposite mosfet trasistors, one that switches high, and the other that switches low. Since they are opposite, one of them is always "off" so that it doesn't allow current through.
*HOWEVER* even with at least one transistor off, a little current always gets through. This is called leakage. While larger transistors only let through a little current, smaller and smaller transistors became leakier and leakier. So while earlier processors had only a little power used for leakage, according to the intel report, this has risen to 50%.
But, you can still make those larger transistors, so you can still prevent the leakage, you just need to have them stop leakage current when you're sure that certain parts of the chip will be "off" for a while. Apparently, intel has found a way to use some architectural method to put these larger transistors in place to reduce leakage current to 1/1000th the amount it would be otherwise.
So now the power can be reduced by nearly the entire amount of the previous leakage current, or nearly the entire 50% that leakage was taking up. In all of this, you shouldn't lose any processing power, because the frequencies are all still very fast, and even though the larger transistors take more time to switch, these will not be the ones performing your actual calculations.
"Scientists don't change their minds, they just die." -- Max Planck
well, half right.... it is a 12 inch process but the 65 is just a coincidence. P1265 follows P1264 (another 65 nm process), P1263 and P1262 (90 nm), and P861 and P860 (eight inch wafers on a 130nm process).... I think you get the idea
A watt is a joule/second. Processors do not emit energy discretly, but rather over time, therefore the appropriate measurement is a rate, thus, heat dissipation is measured in watts.
Joule is only an appropriate measurement for discreet things ... such as, "the chemical reaction consumed 30 joules of energy."
A good analogy would be, how many miles of gas did you use to goto work? 10 gallons ... How much fuel does your car use? 10 miles per gallon, which again, is a RATE. The answer to "how much fuel does you car use?" is not 10 gallons. Its 10 miles per gallon.
In the same sense, a processor doesn't dissipate 30 joules of energy, it dissipates 30 joules per second, and the word for "joules per second" is WATT :)
Religion is a gateway psychosis. -- Dave Foley
energy required to lift 1kg 0.1 meters = 0.98 J not 1 J
Allow me to politely correct you. A calorie is a a discrete measure of energy. A Calorie (big C) is also known as a "food Calorie" and is 1000 calories. To avoid confusion calorie the base unit is always written with a lower case c. .0002389 Calories (big c) are required to lift 1kg 0.1 meters.
Even those who arrange and design shrubberies are under considerable economic stress at this period in history.
An idle P4 wastes 10-15W of static power (maintaining its current state, like when the computer is in standby/sleep mode... this is why we have suspend-to-RAM and hibernate), 15-30W in clock distribution and uses 30-60W more for switching transistors while doing useful work.
Since a CPU is not operating at full-speed and full-load 100% of the time, reducing the average quiescent+clock power by 10X could already extend battery life by a substantial amount - how many people run SETI (or comparable non-essential extensive computational load) on their laptops while operating on battery power?
So, if static power and idle clock power are reduced to practically nothing, even if that power accounts for only half of the chip's budget it can decrease the CPU's average power by 10X, assuming the CPU spends ~90% of its time idling on average.
BTW, if you look at typical battery discharge curves, you will see that the effective AH rating depends on load current... so a 50% reduction in system power would come with a ~10% bonus in usable battery capacity. (Batteries are usually rated for 20H discharge and 12AH batteries typically have an effective rating of 7-9AH when drained at ~50A.)
Source: www.eetimes.com
Ironic for Intel, no?
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It's not related to processor usage, it related to representation of zeros and ones. The ones will still take just as much power. The zeroes won't take as much. You see, leakage current is the current that flows through transistors that are turned off. They are making those transistors NOT waste the energy that they leak.
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