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Intel Developing Ultra-Low Power Chips
ErikPeterson wrote to mention a C|Net article discussing Intel's development of low-power chips for mobile applications. From the article: "The chipmaking giant announced on Monday a new technique that it said could help cut back on wasted battery power in cell phones and mobile devices by as much as 1,000 times current levels. Active computing accounts for only half the power Intel processors use. The other half is gobbled up by a leakage current in transistors that exists when a machine is in a low-level sleep state, Intel said. The new version of the company's 65-nanometer wafer-making process, internally known as P1265, is better than Intel's current process at helping prevent the extra power from being sapped from the battery, the chipmaker said. "
It was about time that Intel started worrying about their chips power consumption and heating.
You think they haven't been? Ever hear of the Centrino architecture? It finally knocked Apple off the top battery performer pedastal a year or two ago.
What you're thinking of are their high end Pentium IV chips, which are quickly approaching the per-centimeter thermal dissapation rates of a nuclear powerplant. (I say as the fans on my Dell case spin up quite loudly...)
Javascript + Nintendo DSi = DSiCade
If half of the current power is used by the computing, and half by heat.
1000 times less means 500 times slower ?
Or am I missing something ?
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You obviously don't know what Intel makes beside desktop Pentium chips... they have some excellent embedded processors. The XScale series, for instance, which is wildly used in PDAs nowadays...
The 90nm process intel is using has a very similar thing, only not done near to the extent their talking about here.
Intel has two sets of transistors for 90nm, high voltage threshold and low voltage threshold.
High VT are fairly power efficient as it is, about 40nA/um leakage, Ion about 31 times greater than Ioff (NMOS)
Low VT (which were used extensivly in Prescott to get it to scale to the 4-5ghz range it was intended for), which are horribly inefficient, with a leakage of about 400nm/um, Ion around 3.5 times Ioff (NMOS)
Seems like this is largely a really really high VT transistor, with a few tweaks to the oxide thickness for good measure.
In any case, it should help out the ultra low power devices to an extent, but won't effect any of intel's 65nm desktop/laptop chips. (save maybe a chipset, but I doubt we'd see a 65nm chipset).
So intel is going to build low power dsp and microcontroller type devices on a more efficient version of their current process node
Big Deal
Everyone does this
It would be RETARDED to build a chip designed for a cell phone on the same process node as a chip designed for a server - you tailor your process to help your chips perform their job better, not build chips that were designed with opposite goals in mind all on the same process
When you want ultra-high performance, you will lose some efficiency - the opposite is also true - this is a perfect example of how everything in engineering esp. semiconductors is a trade-off
Currently the company I work for has 3-4 different process flavors per process node, ranging from ultra high performance to ultra high efficiency, and even within the larger process flavor, tweaks are always performed to ensure chips are getting maximum speed/yield possible out of that specific process
Once you get to 65nm, if you don't have some pretty novel ways of reducing leakage, your leakage power alone can easily eat up 75+% of your power budget.