Sun Open-Sourcing UltraSPARC Design

AKAImBatman writes "While everyone was busy with the holiday season, Sun Microsystems quietly announced the start of the OpenSPARC project. Unlike previous CPUs that were based on the "Open" SPARC specifications (such as LEON), Sun is releasing the complete Verilog source code to their latest and greatest microprocessor. Their current time frame for releasing the source code to the public is in March of 2006. Given their success with the OpenSolaris project, it seems that this is likely to be more than just vaporware. So get out your Virtex FPGAs and your Verilog compilers, and let's get ready to hack some hardware!"

Comments

too far?

[ricochet81]

I'm all for their ideas on OpenSolaris, but this may be going a bit too far. Didn't they open Solaris to sell more hardware? I'm pretty sure a company that doesn't make money is like a species that doesnt reproduce... dead.

Re:too far?

[blastwave]

Personally I enjoy watching Red Hat, Novell/SUSE, Dell and IBM all squirm as Sun undercuts their prices in every product line. I can get Solaris for free, Sun Cluster for free, the tools for free, Java for free, the source code to Solaris for free and a dual core Opteron or multi-core UltraSparc for dirt cheap. The FUD being sprayed by Red Hat/IBM and Novell is just staggering.

Dennis Clarke
http://www.blastwave.org/

Re:too far?

[boner]

... and maybe someone should get informed....

Solaris might be open source soon it already is, thank you very much. Check out OpenSolaris.

...but the CDDL is not compatible with the GPL, and thus, is not free-as-in-speech software... luckily not everybody subscribes to the dim point of view that only GPL is worthy of the name OpenSource. (and what was your definition of FUD again...?).

...Sun regularly has some shady remarks about the GPL... how would a company, in your worldview, express criticism of the GPL, without being shady?

....Novell and RedHat on the other side, who fights SCO, open sources Netscape directory server, shows me that I can trust them. ... and the meek shall inherit the earth...

C'mon JonJ, the world has moved on, time to move along with them. Sun, Novell and RedHat are in the business of making money, they have to act on what is good for the company.

The roadmap is clear

[d41d8cd98f00b204e980]

Sun has a comprehensive roadmap for UltraSPARC going forward and combining forces with Fujutsu on SPARC64.

These new servers absolutely rock, and at superb prices.

I once had the pleasure of a 4-way Opteron v40z with a development version of 64-bit Solaris 10. It was a screamer, especially compared to our 4-way Dell P4 Xeon box, and 64-bit.

It was plenty fast enough to host 4 zones and several developers working on KDE, gcc and all manner of other stuff.

At last, Sun looks like it's turning the corner (despite the best efforts of some of its PHBs - no names mentioned).

Good luck Sun.

Re:Implementability

[Anonymous Coward]

I'm also really surprised if the entire SPARC processor is written in synthesizable Verilog. I would think that this processor would contain numerous asynchronous parts (difficult to synthesize properly) and plenty of custom hard macros (designed at the transistor level).

woohoo!

[2Bits]

It's a little bit early to say yet, but if all the "design source, verification suite and simulation models" are released as open-source (as TFA said), and if the license would allow design and manufacture of systems based on that chip without paying an arm and a leg (which TFA didn't mention), I'd say: "Woohooo!", and I'd say this for all the developing countries, including China, India, etc.

And I hope this will "sparc" a revival of the sparc acrhictecture!

HP should've done the same with the Alpha architecture instead of letting it die a forgotten death. What a shame!

who(m) does it help?

[Sebastopol]

Excluding the fab, it takes an enormous amount of design and layout effort to go from RTL to masks. SparcT1 is not a purely synthesized design. Even if it were, the tuning required to make synth work is a nontrivial effort requiring a significant tool foundry.

I suppose that once we have open source versions of: schematic capture, synthesis, floorplanning, layout, timing, validation, and mask generation, then we can focus on an open source process and an open source fab. Not bloody likely!!!

I think the biggest benefit here is that now both hackers and Universities now have a REAL architecture to study in their classrooms. I'll definitely be on the prowl for resumes of students who studied real microprocessor Verilog in college, and not simple ISCAS circuits or architectures from the 1980's.