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System on a Chip Concurrent Development

Posted by ryuzaki0 on from the plug-and-work dept.

An anonymous reader writes "The old silo method of chip development, with hardware and firmware developers barely interacting with each other, won't cut it in today's fast-moving industry. IBM DeveloperWorks has the third in a series of articles about system-on-a-chip design. The author, Sam Siewert, displays the development tools and processes that speed system on a chip design and get all your developers working together effectively."

4 of 41 comments (clear)

  1. Complete series by Saiyine · · Score: 5, Informative


    Link to all the articles in order.

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  2. nothing new here by wannasleep · · Score: 4, Informative

    Hardware-software codesign is nothing new and revolutionary. It has been taught for years at berkeley and around the country. A bunch of links can also be found here

  3. It's been done by seanadams.com · · Score: 4, Informative

    Why not make a CPU with a built-in FPGA, then load bits of the kernel into that hardware?

    Call me crazy, but that might be more efficient than just throwing more cores at the problem.

    Here's one: Atmels' 20 MIPS processor + FPGA

    The problem is, fast processors are now SO cheap that the applications for a part like this are incredibly limited - you end up with the wrong FPGA and the wrong uP for more than it would probably cost you to buy the right architecture as discrete chips.

  4. Re:This gave me an idea. by Jerry+Coffin · · Score: 4, Informative
    Why not make a CPU with a built-in FPGA, then load bits of the kernel into that hardware?

    Were you thinking of something a lot different from the Xilinx Virtex 4 FX, Altera Excalibur or Atmel part (referred to elsethread)?

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