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Intel Mac Performance Behind Hype
Barry Norton writes "Steve Jobs, at the MacWorld tradeshow, boasted: 'the new iMac [with] Intel processor is two to three times faster than the iMac G5.' MacWorld (the publication) has been putting the iMacs through their paces. The results are a good deal less impressive than Steve's boast, showing an average performance increase of 10 to 25 per cent while performing a series of everyday tasks with software specially designed for the new systems." Ars Technica had another perspective on the new systems earlier this week.
And the only reason I expected it to be any faster was due to the clockspeed being much higher on many of Intel's chips (Yes, clock speed doesn't matter, but there comes a point in difference where it does make a difference). Only thing I've really expected was consideribly better power usage (for Laptops).
In undeveloped countries, the consumer controls the market. In capitalist America, the market controls you.
Plus ça change, plus c'est la même chose.
sulli
RTFJ.
Didn't they used to say that the iMac G5 was faster than a PC with an Intel chip? Love that cyclical logic.
No, it's not. The distinction is between the way the P6 and subsequent x86 cores from Intel (and the NexGen Nx586 and subsequent x86 cores from the company that bought NexGen, AMD) implement the CISC x86 instruction set, i.e. by carving instructions into micro-ops and executing the micro-ops mainly in hardware as individual operations, and the way the microcoded S/360's implemented the CISC S/360 instruction set, i.e. by using the opcode to dispatch to a routine in microcode.
The first is sort of like binary-to-binary translation; the latter is like interpretation.
To what exclamation point are you referring? There was none in my posting (there was one in the subject line of the posting to which I responded, but I didn't put that one there, so I wasn't the one who decided that something deserved an exclamation point).
Then why bring up the S/360's? They didn't decode S/360 instructions into a simpler instruction set; the microcoded ones implemented them as something like calls to routines in a lower-level instruction set - they didn't have a decoder that generated streams of microinstructions on the fly.
The real point is that "CISC" and "RISC" are terms that apply to the instruction set architecture, independent of implementation. The latest shiniest x86 processors execute a "core" instruction set (leaving all the SIMD stuff out) that's very similar to that of the 80386; you don't get access to, for example, the full set of hardware registers used for register renaming, or the micro-ops, so you can't generate code for the "micro-op machine". The micro-op scheme might allow similar implementation techniques to those used in fancy superscalar and OOO RISC processors to be more easily used on CISC processors, but, as you note, that doesn't turn them into RISC processors, because the native instruction set, i.e. the one the processor fetches from memory and runs, isn't RISC. That's the way to make the point that modern x86 chips are still CISC processors.