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A First Look at AMD's M2 Platform
Knight Thrasher writes to tell us that Tom's Hardware has an interesting first look at AMD's AM2 platform. From the article: "While Intel will be answering later this year with its Merom/Conroe processors, AMD officially says that the introduction of its AM2 platform and DDR2 memory support in the second quarter of this year will be able to maintain its current lead. Unofficially, we know that AMD will launch six dual-core and two single-core AM2 processors on June 6 - later than initially expected but well in time for Intel's Conroe, which will be introduced in September. Tom's Hardware got its hands on a stable engineering sample of an Athlon 64 X2 4800+ for Socket AM2 and will publish benchmark results as first as a first impression of the new Socket and processors tomorrow."
and will publish benchmark results as first as a first impression of the new Socket and processors tomorrow.
Nice to see the Editors are living up to their name.
Your hair look like poop, Bob! - Wanker.
So, Slashdot is now referring to articles which will be up tomorrow?
1) Publish story about fancypants new platform being delivered to reviewers
2) Reveal that the benchmarks won't be available until later
3)
4)
5)
6)
7) Dupe!
(Actually 4-6 are also duplicates)
FB-DIMMs should be available by now. If I would go out and buy a socket M2 processor, I'd have to buy a new socket and processor when FB-DIMMs came out (or the switch to DDR3 or whatever). If we had FB-DIMMs then one processor would work with DDR/DDR2/DDR3/SD/whatever just by switching out the memory since the interface is serial and built onto the memory chips. It would allow the life of boards to be extended much longer. Look how long PCI lasted. If you bought a new motherboard in the PCI era and you could keep using it all the way up to now because the socket stayed the same and the memory modules just changed (even though the physical pin out stayed the same) you could do it. Now that PCI-Express is here, we could do that easily for the future.
FB-DIMM is supposed to simplify the board layout too since you don't have to run all those parallel data/address lines to each DIMM. This is supposed to make layout much less complicated. Imagine how many pins would be needed on an Opteron if they wanted to put 4 memory banks on the processor instead of the 2 they have now. That would be a few hundred extra pins. With FB-DIMM that might be one hundred extra pins.
The only need to update the socket would be to provide additional power pins (you could future proof this a bit by putting extra power pins on) or other features (I've heard of someone, Sun perhaps, trying to put Ethernet on the processor die).
I like AMD, but isn't it time we get past these custom memory interfaces for each standard?
Comment forecast: Bits of genius surrounded by a sea of mediocrity.
I thought DDR3 was the future?
I read that it is expected late 2006/early 2007 and Samsung claims it'll be 2x the speed of DDR2 and it'll operate at 1.5v (less power consumption).
I know NVidia is already using it on video cards...
[Fuck Beta]
o0t!
What's the point in using the same socket if your old processor won't work with it anyway? Changing the socket keeps people from thinking wrongly that they can use an incompatible processor with the motherboard in question.
Socket 940 Processors use ECC, registered DIMMs. Socket 939 processors use unregistered DIMMs. So, making the processors different by one pin keeps people from using a processor in a motherboard which won't work with it.
AMD hasn't changed sockets just for kicks. The 754 to 939 transition was to add extra pins for the dual-channel memory controller. The AM2 socket transition will be to add support for DDR2 memory. These things required not just extra pins, but extra traces on the motherboard. Moreover, the traces have different timing characteristics because of the change in memory type. So even if AMD had used a socket with extra pins, old motherboards still wouldn't have the right lines to connect them to.
A deep unwavering belief is a sure sign you're missing something...
I'd rather read the AnandTech article on AM2
Being sort of a slow news day, I tried something different and actually read TF "article", as there were no comments featuring "in Soviet Russia" yet posted. First off, SPONSORED LINKS are evil and annoying.
I see the blurb mentions introduction of 6 dual core & 2 single core chips, and I wonder if this will be the new product tier differentiating mechanism: dual and single. Traditionally, we'd see the low end, which was the crippled version of the mid-range, then the high end typically added more cache and un-crippled SMP abilities. Perhaps the low end will be single core, mid-range dual, and high end w/larger caches & 4/8-way ability.
Now that the MHz "wars" seem to be behind us, it's a race to pack multiple cores onto chips, which I see as a good thing. I've always had a thing for SMP rigs (my current & previous boxes are duals), and dual-core going mainstream means several good things for us SMP freaks, the least of which is more affordable 4-way boxen!
In closing, I'd like to mention that this whole blurb about a story (which is in fact an ad vehicle) which references a yet-to-be published story, is rather silly and bizarre. And poorly written. Like my post.
You're overlooking the frequency difference; because FBD is point-to-point, it can run at 5GHz or more, compared to a mere 800MHz for DDR2. Thus with an equal number of pins, FBD gives much more bandwidth.
Yes, with FB you can put all your DIMMs on a single set of signal lines.
That's not how it is used, so I'm not sure why you are emphasizing that. IIRC, Blackford systems have 4 FBD channels (using fewer pins than two DDR2 channels).
Nobody believed them when they said that they won't make you buy a new mobo to upgrade to dual-core processors. Amazingly, AMD kept their promise! They even migrated some Opterons to 939 so you can upgrade your home computer with a real server chip. Now compare this to Intel and you'll see how disciplined and customer-friendly AMD have been.
Of course, they want to make use of DDR2, and since your old motherboard doesn't have DDR2 slots, you'll need to buy a new motherboard to use DDR2. That's the end of the story! You'd have to be high to think you could keep your board and just upgrade to DDR2. AMD switched the pinout a tiny bit so that you don't make the mistake of plugging in an incompatible processor into the board. There's nothing more to it than that.
So maybe people are complaining about being forced to go to DDR2, but I don't think that will happen. I'm quite sure there will be several new AMD processors for Socket 939, probably priced at the same level as their AM2 counterparts. The only difference will be the memory controller. Of course, it won't make much sense to buy 939, with DDR2 being almost as cheap as DDR.
Maybe people were complaining about the extra burden on mobo manufacturers to retool, but this is absolutely minimal, as the Anand article makes clear. We will see many cheap AM2 boards almost right away, because they are so similar to Socket 939 and 940.
Really, this is a great illustration of how a socket change should look.
I thought FB-DIMMs were merely buffered (as the name implies).
Nope, they're not. They're arranged in a big serial shift register.
The problem with this? Latency goes up as you put in more DIMMs. Why? Because data from the 4th DIMM has to pass through (not just by) the 3rd DIMM, 2nd DIMM and 1st DIMM to get to the CPU.
Sound familiar? It's just a retread of RDRAM.
No thanks. Intel boned themselves with this before. If they want to push this, they better get ready to take a backseat to AMD again. DDR outdistanced RDRAM handily on performance and price/performance, I'll be surprised if things are any different this time.
I hope you enjoy your higher clock speeds, you'll need them to try to get your latency down to managable and your bandwidth up to normal. I mean, with 1/4 as many data pins (I assume the 28 data pins carry only 16 bits of data at once, vs 64 of DDR/DDR2), you're going to have to go 4X as fast just to match the bandwidth and latency of a regular system. And as soon as that 2nd DIMM is put in, you're behind on latency and you're going to have to play catch up.
http://lkml.org/lkml/2005/8/20/95
See link:
http://www.theinquirer.net/?article=15189
What happens is on each clock, the 1st DIMM transfers its data to the CPU. The 2nd DIMM (if there) transfers its data to the 1st DIMM, the 3rd DIMM (if there) transfers its data to the 2nd DIMM, etc. Thus each DIMM gets the data from the next DIMM, puts it in a buffer, thus regenerating the signal electrically and emits it upstream on the next clock. You could call this "daisy chained". This limits how far each DIMM has to drive its data, which is why FB-DIMMs can claim better electrical characteristics.
What this means is to get data from the 3rd DIMM, it takes 3 clocks just to get the first bit of data (presumably 16 bits) to the CPU. The "good" news is that since this system is (semi-) serial, the clock has to be very high already, so this latency is somewhat mitigated.
FB-DIMMs are point to point, but the point-to-point doesn't mean each DIMM connects to the memory controller, it simply means each DIMM is only on a bus with one other DIMM (well, one upstream bus and one downstream bus). Each DIMM forwards data along these busses in both directions. But again, there is no way for the 3rd DIMM to get to the memory controller without going through (and not just by) the 2nd and 1st DIMM first.
Your extension of my argument to PATA vs SATA just underscores your misunderstanding. My concern is with the latency of intermediate forwarding of data. SATA (well, the version in regular use) doesn't even allow you to attach multiple devices to a single bus, let alone have the devices forward the data to the head. Note that PATA allows multiple devices per bus, but it is a true bus, in that the data from the far device just goes by the near device, not into it and back out.
SATA is taking off due to connector costs and cable routing in the case. RAM doesn't face cable routing difficulties. It does face signal routing difficulties, but these only need to be solved once per motherboard design at worst, not once per installation as in cable routing. In addition, the signal routing complexity is much higher for ultra-high speed busses and thus the problem of signal routing will be solved the same way for FB-DIMMs as for DDR or DDR2, which is one company (Intel) will make a reference design and the other motherboard designers will just leave those signal lines alone and add other signals in the I/O area where they want to put on additional SATA RAID controllers. And in regards to connector costs, FB-DIMMs don't change the DIMM connector and thus don't reduce the cost of the DIMM connector. So I don't see a parallel here at all.
Finally, as to DIMMs and busses being forward compatible forever, it's just not going to happen. You'll have the same problem you did with SDRAM (or DDR or RDRAM). All SDRAM was compatible with each other, just the speeds changed. So you can use your old slow DIMMs as long as you don't mind that slowing down all your memory accesses.
Finally, the reason RDRAM failed isn't as simple as your comments that the RAM people screwed RAMBUS. The problem was the RAM people didn't feel like being screwed by RAMBUS. RAMBUS wanted license fees on all RAM made (see their grab at applying their patents to DDR) and so they tried to make RDRAM the standard. Intel also wanted more money per motherboard sold (not just happy selling the CPU). Intel's first attempt at making this happen was Slot 1, where they force-bundled the 2nd level cache memory in with the CPU (2nd level cache SRAM revenue could be $30-$50 per mobo back in the Socket 7 days). Note that 2nd level cache moved to the main CPU chip later. Intel additionally decided to license slot 1, claiming patents on it. Regular front side busses could not be patented, as they were purely functional, considered the most basic way to do something. Slot 1 was positioned so as to patent the physical connector and form factor so they could enforce their fees.
Intel decided to threaten VIA (a very popular Socket 7
http://lkml.org/lkml/2005/8/20/95