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AMD Unveils Barcelona Quad-Core Details
mikemuch writes, "At today's Microprocessor Forum, Intel's Ben Sander laid out architecture details of the number-two CPU maker's upcoming quad-core Opterons. The processors will feature sped-up floating-point operations, improvements to IPC, more memory bandwidth, and improved power management. In his analysis on ExtremeTech, Loyd Case considers that the shift isn't as major as Intel's move from NetBurst to Core 2, but AMD claims that its quad core is true quad core, while Intel's is two dual-cores grafted together."
the memory controllers now support full 48-bit hardware addressing, which theoretically allows for 256 terabytes of physical memory.
256 terabytes should be enough for anybody.
AMD claims that its quad core is true quad core, while Intel's is two dual-cores grafted together.
So Intel's Ben Sander claims that AMD's claim is that Intel claims that their dual-cores grafted together qualify as quad-core technology? That's not confusing at all.
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"In his analysis on ExtremeTech, Loyd Case considers that the shift isn't as major as Intel's move from NetBurst to Core 2, but AMD claims that its quad core is true quad core, while Intel's is two dual-cores grafted together."
BUUUUUUUUUURNED
Next week: Intel responds by telling us how fat AMD's mother is.
Quad core? Bah! That's only 4.
Wake me up when they have a processor that goes to eleven.
As for the quad-core thing, it's the same story all over again. Intel rush out a solder-together-two-chips job to beat the competition to market, and then the actual innovators come out with something coherent that works more efficiently etc.
I'm not saying the AMD will necessarily be better. What I'm saying is I don't care who gets to market 2 months earlier. I want the better chip, and I can live with the mystery for a few weeks.
Although, frankly, I can barely afford to eat having just built a decent Core2Duo rig, so I won't be investing either way just yet...
Meta will eat itself
AMD claims that its quad core is true quad core, while Intel's is two dual-cores grafted together
Note to AMD: We don't care about the implementation details. We care about performance, cost, and power consumption; the clock speed, cache sizes, and how cores talk to each other is irrelevant.
For all I care, Intel's "quad core" processor could be using a team of psychic circus midgets.
Tarsnap: Online backups for the truly paranoid
If anybody at AMD had watched Fawlty Towers, maybe they would have opted for Madrid instead.
(Manuel with thick Spanish accent:) Mr. Fawlty! I'm from Barcelona, I know *notheeeng*!
AMD: 4=4
Intel: 4=2x2
Where do they hire these guys?
-Nano.
Ok guys, CUT THE SHIT!! It's four in the morning and the last thing I want to do is request a new password just to finish posting a comment and come back to find new comments that prompt me to need to go back to my email and login AGAIN
See, some of us just don't ever logout and everytime I come back to my computer Slashdot is waiting happily for me to return. but you couldn't just let that be, could you? nooooooooooo... every JACKASS WITH AN AGENDA and a COMPLETELY UNFUNNY SIG has to dick me around tonight instead of just letting me post in peace.
My apologies, I seriously need some sleep.
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Looks like someone RTFA a bit wrong. Ben Sander works for AMD. He is one of their media presenters. Here are a few of the events he has done: http://www.cpd.iit.edu/cpd/events.htm http://www.ewh.ieee.org/r4/chicago/foxvalley/meet. thru.mid2005.html
http://www.instat.com/FallMPF/06/conf1.htm
http://mtv.ece.ucsb.edu/MTV/index_files/program-mt v.txt
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Why - do you think todays processors won't still be useful in 3 years? Most games don't take advantage of current technology for a year or more I'd say, and your office applications/OS are going to run fine on any of today's decently specced systems (3000+, 3Ghz Pentium, doesn't even matter if they only have one core). The only people that can truly make use of multicore chips would be scientists and people who do any other kind of intensive parallel processing, like like graphics rendering. In 3 years you'll probably want a new mobo anyway to take advantage of whatever new-fangled technology has come out. I guess you could say I'm becoming less of a geek these days even though I'm an IT manager, but if my computer works, and plays the games I like sufficiently (say 1280x1024@60fps with details maxed out), I don't see the need for upgrading my processor (I'd upgrade my graphics card before anything else, since graphics cards come out more often and usually would have a larger effect on performance from one generation to the next).
:p )
Since most of the chipset is becoming integrated into the processor these days then your argument will make more sense over time, but if you were more patient and waited for things to come down in price, as they always do, and rather quicker than I expect sometimes, then you'd be able to buy a new mobo, ram and processor for the same price as the new processor would have cost 6 months previously (not meant to be a perfect example, I haven't been following the prices of stuff since I built my last system a couple of years ago, but the idea is sound
which is totally what she said
As the person who responded to your last post explained, that's just not possible with the K8 architecture as it is. The memory controller is on-die and memory technology is evolving, therefore the interface between the processor (where the controller is) and motherboard (where the DIMMs are) must also change.
The closest to a solution we have would be going back to Pentium 2/3 style processor-on-a-card designs which would move the memory slots to an expansion card shared with the processor which would then have a HyperTransport interface to the motherboard.
This works, as some motherboard manufacturers (ASRock on the 939DUAL for one) have implemented something along these lines for AM2 expandability. The problem lies in laying out the circuitry for this new slot, not to mention the incompatibility with many of the large coolers we often use today. It also would become even more complex when faced with another one or two extra HyperTransport lanes as found on Opteron 2xx and 8xx chips, respectively.
AMD made a compromise when they designed K8. On the one hand, the on-die memory controller improves latency by a huge amount and scales much better by completely eliminating the memory and FSB bottlenecks that Intel chips get in a multiprocessor environment. On the other hand, new memory interface = new socket, no way around it.
From what I understand, the upcoming Socket F Opterons will have over 1200 pins in their socket so as to allow both a direct DDR2 interface and FB-DIMM. If I understand FB-DIMM technology correctly, it should end this issue by providing a standard interface to the DIMM which is then translated for whatever type of memory is in use. Logically this will trickle down to the consumers in another generation. For the time being however, AMD has stated that the upcoming "AM3" processors will still work in AM2 motherboards, as they will have both DDR2 and DDR3 controllers.
I used to get high on life, but I developed a tolerance. Now I need something stronger.
It was indeed, Intel didn't have integrated ("true") dual-core (AMD-style) before the Core architecture. Pentium-D's two cores, for example, had to use the FSB to communicate with one another, they didn't have a specific, fase, core-to-core bus. In the end, they were no better than regular dual-core, except that you only needed a single socket.
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Can anyone please shed some light on the difference (for the user) between a true quad-core and a dual dual-core processor? I expect a quad-core can be cheaper because it is more integrated, but is that it?
Yesterday was the time to do it right. Are we having a REVOLUTION yet?
I won't buy any AMD processors anymore until AMD clears its socket plans and guaranties a minimum of 3 year availability for processors on a socket.
I suppose that means you won't buy an Intel chip either. Look at what happened with Conroe. Core 2 Duo uses a socket with the same name as the P4 socket, the same number of pins too. But guess what? When Conroe came out there were less than a handful of reasonable boards out of the hundreds of models out, that would actually support it. The voltage requirements changed slightly, the BIOS requirements changed, and the end result was that upgrading to Conroe on a given board was hit or miss. I fail to see how Intel's MB upgrade situation is any better than AMD's. It sounds to me like you're falling for Intel's game: "We kept the socket name and number of pins the same, so that means we have better socket longevity." Sorry, but I'm not falling for it. I've read too many horror stories on the forums from Conroe upgraders that thought they could use their current P4 boards.
Don't get me started on Intel's TDP scam either (AMD's = max, Intel's = average). AMD may not always have the best tech, but I find them to be a much more straight-forward company, with fewer sneaky games designed to trick customers.
And why are we posting a story about AMD's tech said/written by an Intel employee? Sounds like it was biased before it even started to me.
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Intel's QC is really an MCM, or multi-chip-module. That means they have literally grabbed two Conroe (Core 2 Duo) chips off of the assembly line, and mounted them in a single package. From the outside it looks like a single chip, but inside, it has two, separate peices of Si, connected over the FSB. That is the problem: the two chips are connected to the same bus. A single chip presents one electrical load on the bus, and two chips present two loads. This means that the speed of the bus needs to be dropped. That is why kentsfield will have a slower bus speed than normal chips. If you think about it, this is the exact opposite of the situation you want. You have just added a core, so it would be nice to add more bus bandwidth. Instead, the Intel solution lowers the overall bus bandwidth, not to mention that it is a shared bus. The two cores fight each other over a very slow external bus, and this creates a performance bottleneck.
When all four cores are on a single peice of Si, all sharing a L3 cache, the chips don't need to fight over the external bus as much. The cores can share information between them internally, and do not need to touch the slow external bus to perform cache coherency and other synchronization. Also, true QC chip presents one load to the outside bus. This means that the bus speed does not need to drop because of electrical load.
There are many people who don't care how the cores are connected as long as the package works. The point is that the way the cores are connected have a direct impact on performance. We'll be talking about Intel vs. AMD cache hierarchy in 2007 when AMD uses dedicated L2 and shared L3 while Intel uses only shared L2. Expect cache thrashing on Intel's true QC chips with heavily threaded loads when it comes out. Next I'll hear people say that the cahce doesn't matter as long as it works. As long as it works for what? Single-threaded tiny-footprint benchmarks like SuperPi or Prime95? How about a fully threaded and loaded database or any other app that will actually stress more than the execution units?
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No, it's more like comparing Siamese Quadruplets against two sets of Siamese twins stapled together.
There's a nice image to drink your coffee to...
One twin? What have you done with the other you horrible man?!
I hate printers.