Could HP Beat Moore's Law?

John H. Doe writes "A number type of nano-scale architecture developed in the research labs of Hewlett-Packard could beat Moore's Law and advance the progress of of microprocessor development three generations in one hit. The new architecture uses a design technique that will enable chip makers to pack eight times as many transistors as is currently possible on a standard 45nm field programmable gate array (FPGA) chip.""

Comments

For instance, the Open Graphics Project

[Lonewolf666]

See http://wiki.duskglow.com/tiki-index.php?page=Open- Graphics.
The development board is going to use a FGPA, because a custom chip design would be too expensive. For later, they plan to produce it as ASIC to improve the price/performance ratio. With better FGPAs, they could stick to the FGPA for the end-user version which would help to reduce investment costs.
Quote about the ASIC design:

RTL for the ASIC will be released under a dual license (GPL and proprietary) There will be a time-delay on some parts (to deal with investor concerns over the $millions necessary to invest in fabrication), but once the investment is recouped, the code will be released. (We need a law firm to escrow the RTL for us, pro bono.)

Moore's Law is part marketing hype

[macurmudgeon]

One of the reasons that Moore's law has so accurately predicted the continual doubling of storage and speed is that it offers companies an excellent guideline for product roll-out. It's a self-fulfilling prophecy. Customers expect computers to get more-bigger-better-faster at that rate, so companies have a production target. That provides a much more stable product ecosystem than one that is marked by a punctuated equilibrium of sudden large advances followed by unpredictable periods of status quo.

Re:The Singularity is Near...

[Stefanwulf]

I understand why we can't predict the weather.
I understand why we can't _predict_ brain function.

I don't understand why that means we can't build a new brain that will simply remain equally unpredictable.
Just because a system is chaotic doesn't make it impossible to construct.

Re:6 to 1

[imgod2u]

This is only true of some FPGA's. Xilinx, in particular, uses look-up tables to simulate logic (along with dedicated flip-flops). Actel, however, has a fine-grain architecture that uses basically a matrix of configurable (solid-state, flash-based) 3-input, 1 output tiles that very much resemble gates. Upon configuration (done once), a high voltage (higher than normal core or IO voltage) is applied and fuses the interconnects in these tiles to behave like the particular gate/flip-flop it's suppose to be have like.