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Supercomputer On-a-Chip Prototype Unveiled
An anonymous reader writes "Researchers at University of Maryland have developed a prototype of what may be the next generation of personal computers. The new technology is based on parallel processing on a single chip and is 'capable of computing speeds up to 100 times faster than current desktops.' The prototype 'uses rich algorithmic theory to address the practical problem of building an easy-to-program multicore computer.' Readers can win $500 in cash and write their names in the history of computer science by naming the new technology."
Second paragraph of the rules:
THE FOLLOWING CONTEST IS INTENDED FOR PLAY IN THE UNITED STATES AND SHALL ONLY BE CONSTRUED AND EVALUATED ACCORDING TO UNITED STATES LAW. DO NOT ENTER THIS CONTEST IF YOU ARE NOT LOCATED IN THE UNITED STATES.
Even though there is a country field in the form. WTF?
They don't mention that on the form page, either. It peeves me just a little bit that they would do that, I mean, how many people actually read these conditions things, anyway? Can't say I'm surprised, though.
3. As has been mentioned time and again, until developers actually embrace multi-threading this will be relatively useless. Tests from various hardware sites have shown that going from the Core 2 Duo to the Core 2 Quad offers very little benefit except for a very small subset of users... who should probably be running workstations anyway (Video editing, 3D rendering, etc.)
RTFA. The article claims:
"The 'software' challenge is: Can you manage all the different tasks and workers so that the job is completed in 3 minutes instead of 300?" Vishkin continued. "Our algorithms make that feasible for general-purpose computing tasks for the first time."
To show how easy it is to program, Vishkin is also providing access to the prototype to students at Montgomery Blair High School in Montgomery County, Md.
Parallel computing has been around for a while. One of the challenges of parallel computing has always been that it is inherently harder to code. These guys acknowledged this, but they say their prototype is "easy" to program. We'll see if they're right.
Yeah this article is pretty week. "Woohoo! Look we took a picture of a last generation FPGA development board and wrote some nifty programs for it that prove our pet project!" I think very little of things like this make it outside of academia. I'm not saying this research is unworthy, just not news worthy.
And "parallel extension of von Neumann" exists. It's called OpenMP and it still takes a skilled programmer to understand.
Look at that board... it uses "SmartMedia" yeah... that means that:
1. This is OLD research
2. The board developers didn't have a clue
3. A very old development board is being used.
I'm going to make an assumption and say that you don't do a lot of system programming. Threaded applications depend... heavily... on synchronizing data access. You simply can't take a single threaded application and break it out across threads without having some context of how it's accessing it's data and why. Imagine landing planes at an airport. It's a serial process... you just can't arbitrarily run it in parallel... "bad things" (tm) happen. The "algorithms" Mr. Vishkin is speaking of have no way of determining the context of code being executed and trying to break it out is a disaster waiting to happen.
There are applications where massive parallelism like this is fantastic... using my initial example... encoding video. Throw each frame off to one of the processors and you're processing 300 at a time (even there there are limitations because each frame requires information from the previous).
But I stand my statement.. anyone who says they can take a serial application and run it in parallel is full of sh*t and they know it. In certain, limited circumstances, yes... but in general. NO.
Here's the deal.
Up 'til now, Parallel Random Access Model (PRAM) computing has been a theory of parallel processing that was a thought model. It hadn't been built. Some people had written programs to emulate a PRAM computer but they were not complete versions.
It could work at a snail's pace and still be a technological accomplishment as it is the very first, complete, working, hardware PRAM computer. It's on par with the Z3, Colossus and Eniac, the first programmable computers (German, English, American, in historical order).
Fortunately, they made the algorithms work well, or at least, if the press release it to be believed, work so that 64 75Mhz computers could produce 100x the performance of a current desktop on at least one particular function. Which is pretty impressive in first-time hardware even if it turns out to be an obscurely used math function known only to about a dozen coders.
I've been on slashdot so long I'm starting to get out of touch with the cool stuff if it ain't on slashdot.
http://en.wikipedia.org/wiki/Transputer
"It doesn't cost enough, and it makes too much sense."
It appears to be a few FPGAs. With FPGAs, you can optimize the logic to represent algorithms for faster execution that on general purpose processors. Simply, you use more of the gates available on the chip. That appears to be what these guys are doing. It also appears that there is a single memory controller (I think that is what the QuickLogic chip is) and there is only one DRAM module installed on the board. It would be interesting if the board had a unified memory architecture. There is a separate Xilinx Spartan FPGA on the board that does who-knows-what, but I wouldn't be surprised if it was involved in communication with the processing chips. Of course, this is speculation, but it would seem logical for a board layout.
Just my thoughts.