Intel Core 2 Updates, QX6850 and E6750
An anonymous reader writes "As AMD's Barcelona approaches, the price war between AMD and Intel continues. To spice things up a bit this week, Intel is throwing into the ring a number of new processors, refreshing the Core2 line-up. HEXUS reviews the high-end QX6850 and mid-range E6750: 'Now is a golden time for anyone looking to buy a new CPU, whether Intel or AMD. The latest round of price cuts means you can now get an incredible level of processing performance for little more than £100. But if your need to buy is not urgent, remember that Intel and its big rival are each promising new processors before the end of the year — AMD with K10 quad-core and Intel with 45nm Penryn-derived CPUs.'"
Have they fixed those bugs?
This will be the on-die partner of Trusted Platform Module, which is already built into motherboards of this generation.
From Wikipedia:
(Link) Personally, I'm going to avoid this technology if I possibly can.
But, the AMD X2s in the office have got the unsync'ed TSC problem (which causes stuff like time appearing to go backwards aka nonmonotonic time, which can cause programs to have problems). Sure in theory you're not supposed to assume they're in sync. BUT in practice on consumer-grade motherboards there's not much choice - often you don't get stuff like HPET or it's broken. Plus if your TSCs are synced, they are a better choice - the other timing methods are actually quite crappy[1].
So the workaround I use at work is to never let the cores idle and always run them at full speed. Boot linux with idle=poll.
Ironically, the AMD X2s supposedly use less power than the Core 2 Duos while idle...
Apparently AMD say they're going to fix the TSC stuff, and though it's been quite a while since they said that, AFAIK I don't think it's been fixed. So if I had to buy a CPU today for a desktop computer, it'll be a Core 2 Duo. The alleged Core 2 Duo security bugs don't appear to be being exploited by hackers all the time, whereas this AMD X2 TSC problem is always there.
I believe there are Windows gamers who are having problems with their AMD X2s and end up running the game/app only on one core and it's probably due to this TSC problem. Yeah the programmers shouldn't use TSC etc etc. But really what are their choices? See [1]
[1] Why can't the CPU + hardware + OS people get together and come up with something good for something as basic as time keeping?
As Vojtech Pavlik summarizes:
RTC: 0.5 sec resolution, interrupts
PIT: takes ages to read, overflows at each timer interrupt
PMTMR: takes ages to read, overflows in approx 4 seconds, no interrupt
HPET: slow to read, overflows in 5 minutes. Nice, but usually not present.
TSC: fast, completely unreliable. Frequency changes, CPUs diverge over time.
LAPIC: reasonably fast, unreliable, per-cpu
http://lkml.org/lkml/2005/11/18/261
Maybe if they merged...
Then we'd have a monopoly and both bus and CPU would suck! Sweet!