MIT Focuses on Chip Optimization
eldavojohn writes "MIT's Microsystems Technology Laboratories is focusing on the manufacturing of chips as the variables that affect chip quality become more and more influential. From one of the researchers, "The extremely high speeds of these circuits make them very sensitive to both device and interconnect parameters. The circuit may still work, but with the nanometer-scale deviations in geometry, capacitance or other material properties of the interconnect, these carefully tuned circuits don't operate together at the speed they're supposed to achieve.""
It's more likely they'll contribute to increasing the yield from each manufactured wafer, making the maybe not so crazy fast desktop processors cheaper. Also, the material and chemical usage will decrease per "good" cpu die, so there's an environmental angle here, which isn't bad either, I suppose.
Just RTFA. It's about RFID chip optimization. But at the 65nm node it's relevant for general CMOS designs as well, including CPU die.
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