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AMD Announces Triple-Core Phenom Processors

MojoKid writes "AMD has officially announced their triple-core Phenom multi-core processor offering, suggesting a triple-threat of processors, from dual-cores to triple-cores and native quad-cores coming to market this year. While the term symmetric multi-processing (or SMP) suggests a balanced approach of multiple cores in an even number of engines working together on a single workload, AMD offers that an odd number of processors can slice at that workload just as efficiently. Time will tell how this architecture will scale amongst various multi-threaded applications and real-world usage models. AMD is definitely moving to make use of these quad-cores that don't quite make the cut by testing them fully as triple-cores and realizing some revenue, rather than throwing them away."

63 of 334 comments (clear)

  1. For the cleanest, most comfortable shave ever! by StefanJ · · Score: 5, Funny

    Damnit, I haven't even used up all the cartridges that came with my Intel Core Duo!

    1. Re:For the cleanest, most comfortable shave ever! by AaronW · · Score: 4, Informative

      I know of at least one 16-core commercial processor. Oh, it runs Linux too.

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    2. Re:For the cleanest, most comfortable shave ever! by SL+Baur · · Score: 2, Funny

      Is it wrong that I'm thinking of building a water cooled laptop with 8 cores, a RAID5 with ~2TB of usable space, and a 24" monitor? Probably. Can you imagine the amount of global warming a beowulf cluster of those things would cause? It might melt the polar icecaps instantly, but hey, that would solve the problem of the water cooling.
    3. Re:For the cleanest, most comfortable shave ever! by arivanov · · Score: 5, Funny

      Go to the USA or Kingston-on-HULL in the UK and look around. You will see plenty of laps ready to comfortably accommodate it.

      --
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    4. Re:For the cleanest, most comfortable shave ever! by TheRaven64 · · Score: 2, Interesting

      Heck - I would love to see a Lisp-machine based on current technology. I could even help design one. I thought Lisp machines were originally stack-based, which was hard to extract ILP from, which resulted in the death of the architecture. The last Lisp machines were Alphas with a pure software Lisp implementation. I'd be really interested in how you would plan on building a Lisp machine with current technology. Possibly go for simple in-order cores and make a Termite-machine, rather than a pure Lisp machine?
      --
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  2. Don't buy yet by Anne_Nonymous · · Score: 5, Funny

    I'm holding out for a processor that goes to 11.

    1. Re:Don't buy yet by (H)elix1 · · Score: 5, Funny

      I'm holding out for a processor that goes to 11.

      Well, technically this triple core CPU does - in binary.

  3. Business as usual by Daengbo · · Score: 2, Insightful

    Chip makers have been doing this for so long I can't actually remember when it started. Now it's cores, but it used to be cache. The chip doesn't pass QA, gets downclocked or rebranded for less cache and sold to the economy sector. Not earth-shattering news.

    1. Re:Business as usual by Clover_Kicker · · Score: 5, Funny

      I wonder if you could build a whole computer from factory rejects. that's easy!!!!!
    2. Re:Business as usual by mkosmo · · Score: 2, Insightful

      Just like the Core Solo being defective Core Duos... so AMD is just following Intel's lead, once again! Then again, how could you blame them? It's good business. You don't have to scrap crappy chips that have at least semi-functioning cores. So you sell it as another product at minimal loss. I'm sure they still make money on it, so it keeps everybody happy: AMD and the economy consumer!

    3. Re:Business as usual by TMonks · · Score: 2, Interesting

      I wonder if you could build a whole computer from factory rejects. It's been a while since I've done any PC building (switched to mac a few years ago), but I was always of the understanding that if you're not buying top-shelf components, there is a pretty good chance that it is a factory reject of a better component. This is especially true with CPU's, of which the slower processors are just faster processors that didn't make the cut and are systematically underclocked until they pass. Same thing with graphics cards, thats why you can usually buy a cheaper card and open pixel pipelines, overclock, etc, until you have the top-of-the-line. Factory rejected RAM gets the company's "value" brand name slapped on it. Can't say that I would ever want to buy a factory-rejected hard drive or power supply, but to each his own...
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    4. Re:Business as usual by Surt · · Score: 4, Insightful

      Quite possibly the best post ever.

      --
      "Who is the Journal of Quantum Physics going to believe?" --Stephen Hawking
  4. Nothing new here. by ArcherB · · Score: 4, Informative
    Doesn't the XBox 360 have a triple core processor?

    Why Yes. Yes it does. From HERE:

    Inside, the Xbox 360 uses the triple-core IBM designed Xenon as its CPU. While graphics processing is handled by the ATI Xenos which has 10 MB of embedded eDRAM, its main memory pool is 512 MB in size.
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    1. Re:Nothing new here. by n+dot+l · · Score: 3, Interesting

      Sort of. Each core can run two threads at the same time (but both threads share the same cache, if I'm not mistaken) so it's somewhere between a hyper-threaded triple-core processor and 3 dual-core processors.

    2. Re:Nothing new here. by Osty · · Score: 2, Interesting

      Sort of. Each core can run two threads at the same time (but both threads share the same cache, if I'm not mistaken) so it's somewhere between a hyper-threaded triple-core processor and 3 dual-core processors.

      It's still three cores on a single chip, and thus "triple-core". The architecture and functionality of an individual core doesn't matter, so long as it's capable of working as a single core (thus the PS3 is not an "8-core" or "7-core" system, since the Cell units are not functional as independent cores).

  5. Someone has been brainswashed by suv4x4 · · Score: 5, Informative

    SMP doesn't suggest the number of cores should be a power of two, it doesn't even suggest "even number of cores".

    It's about multiple cores processing simultaneously. Check the article I link to, even the damn example diagram has 3 cpu-s.

    1. Re:Someone has been brainswashed by suv4x4 · · Score: 5, Informative

      Wait, I missed that, another lie:

      However, AMD is definitely moving to make use of these quad-cores that don't quite make the cut, by testing them fully as triple-cores and realizing some revenue, rather than throwing them away.

      The triple-core Phenom is an actual Phenom architecture, it's not 4-core rejects. Jesus Christ, NEVER accept submissions from hothardware.com anymore!

      That's the worst one in months.

    2. Re:Someone has been brainswashed by RedWizzard · · Score: 3, Informative

      The symmetry in SMP has nothing to do with the number of processors. It simply means that all the processors are treated identically (and therefore should be identical in terms of capabilities). With asymmetric multiprocessing certain processors are used for certain tasks and are therefore often specialised for them.

    3. Re:Someone has been brainswashed by defago · · Score: 5, Informative

      This is almost that, but still off the mark.

      The symmetry in SMP does not refer to the capabilities of the processors. It refers to the relation between the processors and memory.

      In symmetric multiprocessors, all processors access the same shared memory uniformly. That is, memory access delays depend neither on what memory zone nor from which processor it is being accessed.

      In contrast, in NUMA architectures (non uniform memory access), each processor holds a portion of the shared memory that it can access very quickly. A processor can also access the portions of other processors but this incurs potentially large delays.

      At the end of the spectrum, asymmetric multiprocessors combine processors with different capabilities. Here, asymmetric indeed most probably refers to the fact that processors are different. However, while most (all?) actual implementations using a NUMA architecture do use identical processors, they are never said to be symmetric because of the memory access.

    4. Re:Someone has been brainswashed by JackMeyhoff · · Score: 2, Funny

      Argh my eyes, dazzled by facts! Im blind!

      --
      http://www.rense.com/general79/wdx1.htm
    5. Re:Someone has been brainswashed by RedWizzard · · Score: 2, Informative

      The symmetry in SMP does not refer to the capabilities of the processors. It refers to the relation between the processors and memory. The symmetry refers to all the capabilities of the processors, including their access to memory. SMP means that all processors in the system are interchangable from the OS's point of view - that cannot be the case if any characteristic varies between the processors. A system with different processors that have the same access to memory (such as an unexpanded Amiga 1000) is not considered an SMP system.
    6. Re:Someone has been brainswashed by adisakp · · Score: 3, Informative

      The symmetry in SMP does not refer to the capabilities of the processors. It refers to the relation between the processors and memory.

      Wikipedia would disagree with you: "Symmetric multiprocessing, or SMP, is a multiprocessor computer architecture where two or more identical processors are connected to a single shared main memory."

      SMP implies that there is a shared memory address space and that the cores can execute similar binaries. NUMA implies separate banks of memory dedicated to specific CPUs -- for example, AMD Opteron. However, most vendors still call the Opteron 'SMP' when used in a multi-CPU configuration because the "independent" banks of memory are mapped into the same memory address space (visible from all CPUs) and there is neglible penalty for executing tasks on either core regardless or location of code or data ***. (*** note: memory banks shouldn't be completely ignored for memory intensive high-performance computing applications and indeed on certain OS's like Vista, it is possible to allocate memory with CPU affinity or to schedule tasks with CPU affinity on an Opteron to alleviate NUMA crosstalk between the CPUs).

      ASymmetric MultiProcessing (ASMP) implies dissimilarity in either the processing units (different binary opcodes) or disjoint memory accesses. Using a physics-accelerator or a generic-GPU programming with a main CPU is asymmetric processing even if the accelerator can access the same memory as the CPU (i.e. from cheap "shared-memory" GPU such as those integrated on cheap motherboards or to more powerful ones such as the GPU in the XBOX360). The CELL in the PS3 is not SMP because the PPU and SPU can not execute the same binaries and the cores are asimilar even though all cores have some method of accessing the main memory with a shared address space (although the SPUs also use a DMA read/write to main memory rather than direct access which would doubly qualify them as ASMP - but even without this memory difference, they would still be ASMP processing).

    7. Re:Someone has been brainswashed by Eunuchswear · · Score: 2, Funny

      No, they're using rotational symmetry, not reflection.

      Your data gets turned through 120 degrees as it moves from core to core, irritating, but better than having it come out sdrawkcab as sometimes happens with dual core processors.

      --
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  6. Fourth Core Unlocking by kiehlster · · Score: 2, Interesting

    So when does the race to unlock the fourth unused core on a triple-core processor start? What's Next? Hard drive platters?

    1. Re:Fourth Core Unlocking by level_headed_midwest · · Score: 5, Interesting

      There are a few possibilities:

      1. The core is there and locked off via microcode like the extra quads on a cut-down GPU (e.g. Radeon x1900GT vs. x1900XT) and can be enabled with a microcode flash.
      2. The core is there but the fuses that connect it electrically to the rest of the die are blown, so it is there but not able to be enabled.
      3. The core was never there as the die only has three cores in it in the first place- you have a fully-functional piece of silicon, so there is nothing extra to enable.

      Either way, it's really long odds you'll get a free core enabled. Nobody has been able to even upward-unlock the K8's multiplier and I know for a fact that is set in microcode (some guys on ExtremeSystems got a JTAG and found that out but not how to change it.) They will probably use the same method they used to disable one core on a dual-core die and sell single-core Manchester and Toledo-die chips and AFAIK nobody has unlocked any of those. I bet they have a few of the X3s be X4s with a bad die, but the X4 is a darn big chip at nearly 300 mm^2 and the cost reduction by using a native 3-core die would be mighty attractive to them so I guess that most will be #3 then.

      --
      Just "gittin-r-done," day after day.
  7. Single, double, triple, and quad by Bryan+Ischo · · Score: 3, Interesting

    Wouldn't it make sense to sell any part that had at least one working core? Meaning that if in making quad-core chips, W% of them ended up only having one working core, X% had 2, Y% had 3, and Z% had four, wouldn't it make the most sense to sell all of these chips?

    This implies that they have a way to use all four cores independently. Maybe they can't; maybe one core is "special", like the "master" core that has to be working for anything to work. Also this implies that the cores can detect that their sibling(s) aren't working and switch to a mode in which the sibling is not used at all.

    Also, a question - when a core doesn't function properly, is it somehow disabled completely so that it doesn't use any power? Or maybe a core that isn't being fed any instructions doesn't use any power anyway?

    1. Re:Single, double, triple, and quad by Chris+Snook · · Score: 4, Informative

      The Barcelona/Phenom architecture allows each core (plus the northbridge) to run on its own power plane, and for cores to be turned off completely. Of course, core 0 is the bootstrap processor, so that core has to always be enabled, or they have to have a way to change which one is core 0 before it leaves the factory. Otherwise the BIOS won't be able to bring the other cores online.

      The idea of post-factory error detection isn't so far-fetched. If a chip passes QA, the sorts of defects you'll see later in its life are likely to be thermally induced, and the likelihood that the defect will manifest prior to loading of the BIOS is very low. You're not using the MMU or the FPU at all, you're not using much of the cache, you can be running at your minimum power setting, and you're not doing it long enough to heat up much. If a core gets marked bad due to an excess of MCEs, similar to how many systems can mark DIMMs bad on excessive multi-bit ECC errors, the BIOS simply doesn't need to bring it online at boot time. Even if core 0 is the faulty one, you can probably load just enough of the BIOS to bring a good core online and finish booting, since you're not straining it enough to cause thermal problems, and you're only using a tiny fraction of the instruction set and die transistors. This sort of High Availability feature probably won't make it to the desktop right away, but as core counts keep increasing, it's inevitable.

      --
      There's no failure quite as dissatisfying as a complete and total solution to the wrong problem.
  8. Just a binned part? by Erich · · Score: 3, Informative
    The picture clearly has a quad-core processor in it. Is this just a binned quad-core processor where one of the cores has a defect (like what Sony did with their Cell chip?) Or is it something separate, where they use the florplan for an L3 or something?

    And why should ``symmetric'' imply even? It merely implies that all cores see memory with the same class of service. And, in reality, aren't most AMD multiprocessors cc-NUMA machines, not SMP?

    For most workloads, if they are fairly multithreadable, 3 processors available will be just fine. I know of very few workloads that require an even number of processors, and even if it were the case that the task were split into an even number of threads, the OS should have no problem scheduling on a reduced number of processors.

    Hey, doesn't the XBox 360 have a 3-core PPC in it?

    --

    -- Erich

    Slashdot reader since 1997

    1. Re:Just a binned part? by suv4x4 · · Score: 4, Informative

      The picture clearly has a quad-core processor in it. Is this just a binned quad-core processor where one of the cores has a defect (like what Sony did with their Cell chip?)

      This is what the article authors suggest, but no, it's a separate architecture. While I suspect it's possible a subset of the 4-core Phenoms to be relabelled as 3-core Phenoms, the bulk of 3-core Phenoms will be built as 3-core parts from the very start.

      And, to add insult to injury, this is a quad-core Phenom on the picture, since it's all the authors of the fine article could find. In other words, they are idiots.

  9. Even? What the hell? by sholden · · Score: 3, Informative

    Symmetric just means the processors are equivalent (they all do the same generic tasks)... As opposed to an asymmetric system where different processors are assigned different roles (one does interrupts, one does graphics, one does IO, etc)...

  10. SMP Doesn't Suggest Even Numbers Of Processors by logicnazi · · Score: 5, Informative
    Here is the definition from wikipedia.

    Symmetric multiprocessing, or SMP, is a multiprocessor computer architecture where two or more identical processors are connected to a single shared main memory. Most common multiprocessor systems today use an SMP architecture.

    SMP systems allow any processor to work on any task no matter where the data for that task are located in memory; with proper operating system support, SMP systems can easily move tasks between processors to balance the workload efficiently.


    SMP refers to the fact that all the processors are identical and share the same memory (in contrast to NUMA designs like multi-chip Opteron systems). However, I've seen more and more people refering to cache coherent NUMA designs like multi-core opteron and the upcoming CSI based intel systems as SMP systems which, while a stretch of the definition, is at least reasonable.

    Suggesting that SMP has anything to do with having an even number of processors is just DUMB. It may be the case that SMP systems usually have an even number of cores (I don't know) but that's not what the writeup or article seem to be saying.
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  11. Re:I wonder how many GHz these can crank out by Seumas · · Score: 3, Interesting

    Quite good, perhaps, but for less money you can certainly get better performance out of Intel. As much as I have loved AMD for the last decade, Intel is completely eating their lunch at the moment and Phenom and Barcelona are not going to save them. We can only hope that in the next couple of years, they have something in the pipeline that rescues them and their less than 15% market share, before someone gobbles them up.

  12. Re:2^n = 3, where n belongs to Z is not possible by level_headed_midwest · · Score: 2, Funny

    Volvo also makes a 2.0 L five-cylinder engine, as does GM (saws the last cylinder off the 4.2 L straight-six to make a 3.5 L five.) I doubt your OS will care whether you have 2, 3, or 4 cores as long as it supports SMP in the first place.

    --
    Just "gittin-r-done," day after day.
  13. Re:2^n = 3, where n belongs to Z is not possible by edwdig · · Score: 3, Informative

    I always thought that too, but the Xbox 360 has a 3 core CPU as well.

    Supposedly 3 core is actually pretty nice in some ways, as each core has a direct link to the other two. On a quad core system, each core is linked to two others, so sometimes it takes two hops to get messages from one core to other, slowing things down.

  14. SMP? by Door-opening+Fascist · · Score: 2, Insightful

    I always thought SMP meant that all the processors are treated equally as far as available resources, and had nothing to do with the number of processing units available.

  15. Re:Manufacturing Yield vs. Marketing Perception by level_headed_midwest · · Score: 3, Insightful

    Intel makes the Core 2 Quads by putting two Core 2 Duos together under the heat spreader. They are separate dies- go buy a Q6600 and pop the IHS off and look at the two separate dies yourself if you need proof. Intel tests the dies before they are mounted on the substrate, so a die with a bad core never makes it into the C2Q. Another fully-functional die is used in its place. The die with one bad core is either sold as a Celeron 4x0 or thrown away as defective. Intel doesn't make a single die with four cores like AMD is doing. Once they do, then they will have to worry about what to do with a quad-core die with one bad core. They can either pitch it, sell it as a 3-core, or disable another core and sell it as a dual.

    --
    Just "gittin-r-done," day after day.
  16. Re:Symmentric connections? I think not by vrmlguy · · Score: 2, Informative

    Despite both the summary and the article, it's a real 3-core chip, designed that way from the ground up, so I presume that the data paths are the same length. IIRC, somebody designed and sells a three socket mobo where all the data paths are also equal. (Ah, here it is: http://hardware.slashdot.org/hardware/07/08/13/1749213.shtml, a three socket Opteron machine with two PCIe slots and two Infiniband 4x ports.) I'd like to see a version for the Phenom 3-core CPUs; even better would be building some sort of Beowulf cluster using three of them, each using a pair of cross-over cables for the interconnects. That would give you one sweet 27-way cluster.

    --
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  17. Re:2^n = 3, where n belongs to Z is not possible by edwdig · · Score: 2, Informative

    Latency probably is the issue. Remember the Pentium 4 - it had a pipeline of over 20 stages, with a some of those stages being there simply to allow time for the signals to make it from one side of the chip to the other.

  18. Re:2^n = 3, where n belongs to Z is not possible by AuMatar · · Score: 2, Insightful

    No, there's no reason it has to be a power of 2. The reason they usually are is that you have to use log_2(number of cores) addressing lines to identify a CPU, so you may as well use them fully. But there's nothing that stops you from having a smaller number.

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  19. Three dollar bill by mollog · · Score: 4, Funny

    This reminds me of the joke about the 3 dollar bill. Counterfeiters mistakenly make a 12 dollar bill, so they go to a rural state, like Idaho, to try to pass it off. Going into a store they ask for change. The clerk asks "would you like four three's, or two six's?"

    --
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  20. With apologies to the Onion by Anonymous Coward · · Score: 5, Funny

    Would someone tell me how this happened? Intel was the fucking vanguard of computing in this country. The Core Duo was the processor to own. Then the other guy came out with a three-core processor. Were we scared? Hell, no. Because we hit back with a little thing called the Core Trio. That's three cores and an fan. For cooling.

    But you know what happened next? Shut up, I'm telling you what happened -- the bastards went to four cores. Now we're standing around with our cocks in our hands, selling three cores and a fan. Cooling or no, suddenly we're the chumps.

    Well, fuck it. We're going to five cores.

    1. Re:With apologies to the Onion by ejdmoo · · Score: 4, Informative

      YES!!!!!!

      Mod parent up, please, and while you're doing that, read this:
      http://www.theonion.com/content/node/33930

    2. Re:With apologies to the Onion by alannon · · Score: 2, Informative

      It was an old SNL skit.

    3. Re:With apologies to the Onion by Tribbin · · Score: 2, Interesting

      But intel can't do 3-core by design right?

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    4. Re:With apologies to the Onion by jollyreaper · · Score: 2, Funny
      No, you missed a meme. Fixin' it for ya.

      Would someone tell me how this happened? Intel was the fucking vanguard of computing in this country. The Core Duo was the processor to own. Then the other guy came out with a three-core processor. Were we scared? Hell, no. Because we hit back with a little thing called the Core Trio. That's three cores and an fan. For cooling.

      But you know what happened next? Shut up, I'm telling you what happened -- the bastards went to four cores. Now we're standing around with our cocks in our hands, selling three cores and a fan. Cooling or no, suddenly we're the chumps.

      Well, fuck it. We're going to a beowulf cluster.
      --
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    5. Re:With apologies to the Onion by Anonymous Coward · · Score: 3, Informative

      No, the thing that's awesome is that eighteen months after the Onion article was published, Gillette actually did it.

  21. It was used in a couple different Honda cars... by ZxCv · · Score: 2, Informative

    It was first used for the early 90's Acura Vigor/Honda Accord. I wanna say 93 but probably 92 or 91 knowing my awesome memory. Beyond that, they also used it for a couple years in the Acura TL in the late 90's.

    Next question please... ;-)

    --

    Perl - $Just @when->$you ${thought} s/yn/tax/ &couldn\'t %get $worse;
  22. Re:I wonder how many GHz these can crank out by Mr2001 · · Score: 2, Informative

    Quite good, perhaps, but for less money you can certainly get better performance out of Intel. As much as I have loved AMD for the last decade, Intel is completely eating their lunch at the moment and Phenom and Barcelona are not going to save them. Really? I built an Athlon 64 X2 6000+ system a few weeks ago and the comparable Intel chips seemed a lot more expensive. The Core 2 Duo E6700 seems to perform about 5-15% better, but costs nearly twice as much ($320 vs. $170 at Newegg).
    --
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  23. Amd owns the low-end. by SanityInAnarchy · · Score: 3, Insightful

    For about $60, I can get a dual-core 64-bit processor at something like 2 ghz. Maybe I wasn't looking in the right place, but the cheapest Core 2 Duo I saw was over $100.

    Also, you're absolutely right that we should hope AMD doesn't get gobbled up. The current Intel stuff, it seems to me, is a direct result of AMD dominating the price/performance ratios for so long, and even, recently, doing well with performance/watt. So even if you don't end up buying AMD, having them as a constant threat means Intel will be forced to compete.

    --
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  24. The day is coming... by audi100quattro · · Score: 2, Funny

    ..when more than 4GB's of ram will become the norm and software makers will be forced to make and support decent x86-64 ports. Give them 5-10 more years to make and support decent multi-threaded software.

  25. Re:Symmentric connections? I think not by AcidPenguin9873 · · Score: 2, Informative

    AMD's multi-core processors use a fully-connected crossbar switch in the on-die northbridge to communicate. There is only one "hop" between each core.

    What you're thinking of is a four-socket system whose interconnect network is not fully-connected - it's only the edges of a square, and there are two missing links between the "corners" of the square. That is certainly a legitimate topology for a four-socket system, with the limitation you pointed out (two hops to get to the opposite node), but it doesn't apply to AMD's quad-core die.

  26. Magic number 3....simple when you know how! by Joce640k · · Score: 2, Funny

    Here's what's going on:

    AMD has a process which can put X number of transistors on a chip.

    One of their cores needs Y transistors.

    A qualified engineer with years of training in advanced mathematic divided X by Y and got the number "3".

    So... the chip got three cores.

    Mystery solved!

    --
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  27. A very real reason for using triple-core by inflex · · Score: 2, Interesting

    In theory with triple core, each processor is only 1 step away from the other processor (consider a triangular setup). With Quad core or greater there's either more bussing or more delays.

    Without seeing further details I sincerely doubt that these are quad-core chips with one dud core. I suspect AMD has actually used their technical brains here and given us the fastest non-(overly)complex multi core setup.

    Of course, if it's the bean counters in charge, then it's possible it's a failed quad core (though I still have doubts).

    1. Re:A very real reason for using triple-core by AcidPenguin9873 · · Score: 5, Informative

      In theory with triple core, each processor is only 1 step away from the other processor (consider a triangular setup). With Quad core or greater there's either more bussing or more delays.

      Firstly, for any general multi-node graph, it's entirely possible for three, four, eight, or any number of nodes to be only one hop away from each other. See fully-connected mesh. For the four-node case, imagine a 2D square, connected on the four sides, plus two links connecting the "diagonals" of the square. In that topology, each of the four nodes are only one hop away from each other. Of course, as the number of nodes increases, the cost of fully connecting them increases, as does the processing cost to multiplex and process transactions into the node from the (n-1) incoming links, but with only four nodes it's entirely possible to create a fully-connected network.

      Wiith AMD multi-core processors, all of the cores communicate using a fully-connected crossbar switch in the on-die northbridge - meaning all cores on the die are one "hop" away from each other, including the four-core case. What you're probably thinking of is a multi-socket system that only has two coherent links per socket - that would prevent you from making a fully-connected coherent interconnect for a 4-socket system.

    2. Re:A very real reason for using triple-core by TubeSteak · · Score: 2, Informative

      Firstly, for any general multi-node graph, it's entirely possible for three, four, eight, or any number of nodes to be only one hop away from each other. Firstly, we're not talking about any general multi-node graph.
      We're talking about CPUs & AFAIK, the the traces can't cross one another..
      Unless they commercialized some 3D process @ 65nm that I didn't read about. Wiith AMD multi-core processors, all of the cores communicate using a fully-connected crossbar switch in the on-die northbridge - meaning all cores on the die are one "hop" away from each other, including the four-core case. Sooo...
      Cpu 1 --> hop --> northbridge --> hop --> CPU 4
      Or am I misunderstanding the definition of a "hop"?
      --
      [Fuck Beta]
      o0t!
    3. Re:A very real reason for using triple-core by AcidPenguin9873 · · Score: 2, Informative

      We're talking about CPUs & AFAIK, the the traces can't cross one another.

      There are around 10 metal layers in a modern IC. Traces can certainly cross one another on different layers.

      Cpu 1 --> hop --> northbridge --> hop --> CPU 4 Or am I misunderstanding the definition of a "hop"?

      I see what you're saying...but you're counting a processor interface as a hop. How many hops are there between cores in an Intel system then? CPU 1 --> hop --> front side bus --> hop --> CPU 4? No one counts hops that way. Your definition of hop would be like me saying there are two hops from your computer to your router, one between your processor and your network card over the PCI bus, and one between the network card and the router over ethernet.

    4. Re:A very real reason for using triple-core by AcidPenguin9873 · · Score: 3, Informative

      Before you call me incorrect, please take 2 minutes to look at some lecture notes from an intro VLSI course:

      http://www.cse.sc.edu/~jimdavis/Courses/2005-Fall%20CSCE%20613/CSCE613-Week10-Chapter-04-05.pdf

      You can clearly see on page 3 (slide 6) that metal1 and metal3 are directly on top of each other. As I stated in a different post, you're confusing metal layer/wire routing in an IC with entire logic devices (transistors/gates/flops). Let me repeat it again for you: metal layers in an IC can cross.

  28. AMD's bad decisions.. by cyberjock1980 · · Score: 2, Interesting

    So everyone's talking about how much pain AMD is in. Bleeding cash 24x7. So they've spent money on R&D for a 3 core processor!? Are you kidding me? Did they REALLY think there's gonna be a big market for three core computers!?

    This seems like almost as bad of a decision as Intel made going with Netburst. The difference being Intel could afford to make a big mistake. AMD doesn't have that luxury, and their new luxury might be going bankrupt. Sure, Intel went with Netburst because it solved several technical problems at the time. But what problems does this solve for AMD? It seems like it would have been more cost conscious to design the 4 core, and if one core fails then just enable the 3 cores.

    But seriously, what market is this really gonna be useful for? People generally are in 2 categories. Surf the net, check email, maybe some light gaming(in which case a dual core is plenty). Or a power user, playing some of the most advanced games in the world(in which case a quad core is what they buy). Where's the user that does both and isn't going to spring for a quad core, yet go buy those $50+ games every month? It doesn't make sense to me.

  29. Re:I wonder how many GHz these can crank out by TheLink · · Score: 4, Insightful

    It's actually kinda sad for AMD. In other markets they'd be making money.

    After all their stuff:
    1) Actually works (and is reliable compared to other computer stuff - RAM, HDD, motherboards, etc)
    2) Is cheap
    3) Is available in sufficient quantities
    4) Performs ok

    Only prob is Intel is now significantly ahead of them in many areas.

    That's what you get for being in a high tech commodity market where lots of buyers actually go by specs and price and not by covenience or brandname.

    If AMD was number two in the orange juice, soda pop or cooking oil market with just 15% share they'd still be making money. And they could sell the same standard juice/soda/oil for years without investing billions in fabs and processes.

    AMD has lots of smart people working for them.

    It's better to be number 9 in good industry than number 2 in a crappy industry.

    Kids, learn from this. That's why smart parents discourage you from trying to earn a living as a movie star or singer, the number #10000 star/singer in the world doesn't make as much as the number #10000 lawyer/doctor.

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  30. Not even that.. by Junta · · Score: 3, Informative

    You can do 4 objects and connect them all without oven using another layer. Picture a triangle with the other component in the middle. Connect every vertex to the middle. Make the traces to the middle zigzag a bit to even out the trace lengths, and boom, fully connected without any intersections. Not saying this is how things are done, mind you, but it is a silly argument to say three cores are good because they can be connected trivially. 3-core cpus are all about yield. Being able to sell components that had a flaw in a core, without reverting all the way down to a two core part (and by extension the two core price point), is important.

    All that said, SMP has nothing to do with an even number of processors/cores. It just means each processing element of a system is roughly equivalent. So you have a choice of three parts to schedule something on, the scheduler can know all three are equally capable and the heuristics for processor selection are straightforward. ASMP typically has specific roles for each part (i.e. a dedicated processor for interrupts, etc etc)

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    XML is like violence. If it doesn't solve the problem, use more.
  31. Re:2^n = 3, where n belongs to Z is not possible by johnw · · Score: 2, Interesting

    My car has a 3 cylinder engine.

    Lister have been making 3 cylinder (and 2 cylinder, and 1 cylinder) diesels for years.

  32. Re:2^n = 3, where n belongs to Z is not possible by TheRaven64 · · Score: 3, Informative

    Another reason why powers of two are popular with multicore chips is that powers of two can be laid out into rectangles. If your multicore design is basically a copy-and-paste job with a little glue logic, it's a lot easier to lay out the cores. With something like the Cell, 8 is a nice number of cores since it allows you to have two rows of four. Three is just awkward.

    The Cells found in the Playstation 3, however, did not have 8 SPU cores, they had 7. This is because most of the die space is the SPUs and you can dramatically increase yields if you only expect 7 of the 8 to work. If a single SPU has a manufacturing flaw, you just disable that one and sell pop the chip in a PS3. If none of them do, you sell it for more expensive blades.

    AMD and Intel have been doing this for a while. Chips with flaws in the cache have some of the cache disabled and are sold more cheaply. In addition AMD chips are designed with three hypertransport controllers. If only one works, the chips are sold as Athlon 64s. If two work, they are cheap Opterons, if all three work, they are expensive Opterons (exactly how expensive depends on how many flaws there are in the cache area). Similarly, with the dual core lines flaws in one core result in them being marked down as single-core chips.

    Intel, currently, sell quad core chips containing two separate dies. If either die has a flaw, it is sold as a Core Solo and not put in a dual-die package. AMD, however, are going to be making single-die quad-core chips. Selling three-core versions allows them to make use of the ones with a flaw in one core. This should help keep their yields high (and thus their costs relatively low), since it means that they can sell flawed chips almost irrespective of where the flaw is, just marking it down as a cheaper part.

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  33. Re:Three dollar bill - there was a point... by LordKronos · · Score: 2, Funny

    That was very insightful. It was almost as if you read the summary.