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Dell Set to Introduce AMD's Triple-core Phenom CPU

Posted by Zonk on from the lots-of-balls-in-the-air dept.

An anonymous reader writes "AMD is set to launch what is considered its most important product against Intel's Core 2 Duo processors next week. TG Daily reports that the triple-core Phenoms — quad-core CPUs with one disabled core — will be launching on February 19. Oddly enough, the first company expected to announce systems with triple-core Phenoms will be Dell. Yes, that is the same company that was rumored to be dropping AMD just a few weeks ago. Now we are waiting for the hardware review sites to tell us whether three cores are actually better than two in real world applications and not just in marketing."

2 of 286 comments (clear)

  1. There is a known problem with current Phenom... by ELiTeUI · · Score: 5, Interesting

    There are a couple known problems with the first spin of the Phenom die (codename Agena).

    The first (and less relevant) problem is the TLB errata. The second (and more relevant to this discussion), is a problem in which core #2 (out of [0,1,2,3]) is lower yielding than the first three. For example, on the same CPU die, cores [0,1,3] may work fine at 2.6Ghz, but core [2] yields only at 2.0GHz. This is a widespread problem, mostly found out through failed overclocking attempts.

    Google it yourself and find out..

  2. Re:You know what would be even better? by jp102235 · · Score: 5, Interesting

    ok, I am an IC test engineer:

    #1: you do test these chips before the saw step (chopping the wafer up into individual die)
    #2: its hard to predict speeds/vcc/temp sensitive yields at that stage, but you do test all the die and usually check for full functionality (as much as the test coverage allows)
    #3: once packaged, the chips are "binned" to functional fails, speed grades. etc, and are tested at temp, vcc limits for speed sorting. so you could have 1 core that fails at 30C with a high vcc, but the others are ok (this is should be rare since they all sit together on the wafer in close proximity, and thus shouldn't vary much from each other)
    #4: nanoscopic defects occur and could take out one or two of the die. It would be advantageous to bin this out as a tri/dual core.
    #5: I am 100% sure that if these become popular, there will be some chips that pass all tests fully, but have one core disabled. happens all the time.

    JP

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    jp