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Details of New Intel Dunnington and Nehalem Architectures Leaked

Daily Tech is reporting that details about Intel's new processor models were leaked over the weekend. Both the six core Dunnington and Nehalem architectures were featured in this leak. "Dunnington includes 16MB of L3 cache shared by all six processors. Each pair of cores can also access 3MB of local L2 cache. The end result is a design very similar to the AMD Barcelona quad-core processor; however, each Barcelona core contains 512KB L2 cache, whereas Dunnington cores share L2 cache in pairs. [...] Nehalem is everything Penryn is -- 45nm, SSE4, quad-core -- and then some. For starters, Intel will abandon the front-side bus model in favor of QuickPath Interconnect; a serial bus similar to HyperTransport."

8 of 147 comments (clear)

  1. Dunnington and Nehalem? by Anonymous Coward · · Score: 5, Funny

    Sounds like good names to be used in a D&D game!

    Sir Dunnington against the evil lich lord Nehalem!

  2. QuickPath vs HyperTransport by Dice · · Score: 5, Interesting

    The Wikipedia page on QuickPath is very lacking in the realm of details. Does anyone know how it stacks up against HyperTransport? One of the most mouth-watering proposed uses for HT3 that I've heard of was the possibility for an external HT3 bus on a machine which could be used to link together multiple physical machines into one giant NUMA beast.

    Imagine a Beowulf of those ;)

  3. But... by chinkuone · · Score: 5, Funny

    Still doesn't run Crysis.

  4. Re:6 cores times 3MB = 16MB? by The+End+Of+Days · · Score: 5, Informative

    The L3 cache is 16MB. Each pair of cores shares 3MB of L2 cache. They aren't the same thing at all.

    Note: if you're tempted to mod this up, don't. I rehashed the summary.

  5. Welll.... by downix · · Score: 5, Funny

    Does it go to 11?

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    Karma Whoring for Fun and Profit.
  6. Re:Intel still playing the Chuck Norris of vendors by nonsequitor · · Score: 5, Interesting

    QuickPath: because Intel doesn't adopt standards... it rewrites them.
    Why should Intel pay AMD to license HyperTransport? The specs may be open to developers, but that does not mean they are unencumbered by patents. Even if they could, why Would they?

    I don't really know the situation surrounding the technology, but even if Intel could use it for free, they would lose a huge battle in the PR War. I can see it now, "Remember that interconnect AMD has been using for years now? Well our design has finally caught up with theirs enough to use it." Remember that to the masses, the non-slashdot crowd, they have no idea what the techno-jargon spouted by Intel marketing means.

    Intel currently has the superior technology, this is because of superior fabrication capabilities, not because of a superior architecture, if I've been following this correctly over the last few years. The general public is oblivious to the fact that internally the AMD architecture is cleaner and more elegant, the only thing they have to go on is marketing. If Intel were to adopt HyperTransport, which IIRC is trademarked by AMD, that would be a huge step backwards for Intel marketing, which is just recovering now that the Core 2 architecture has put them back on top.
  7. Re:FSB by networkBoy · · Score: 5, Interesting

    Very true!
    Now, hopefully Intel will open the new bus to third party apps (like that FPGA opteron drop-in). I'll admit I'm an Intel fanboy, but I'd buy an opteron system in a heartbeat if I could pony up the $5K for that co-processor...

    What surprises me is the current lack of complaints that you can't drop these new processors into an old board, as a new socket will be required (this is because the northbridge is rolling into the CPU IIRC). I don't see it as a big deal, because usually when upgrading the CPU one also is upgrading the memory and MB as well.
    -nB

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  8. Re:6 cores times 3MB = 16MB? by sssssss27 · · Score: 5, Funny

    Which kind of puts in perspective just how long Duke Nukem Forever has been in development. It's almost getting to the point where the CPU alone meets the minimum requirements for RAM.