Tilera Releases 64-Way Chip Dev Tools
eldavojohn writes to tell us that Tilera has released a Linux-based development kit for their 64-core system on a chip. "The Tile64 is based on a proprietary VLIW (very long instruction word) architecture, on which a MIPS-like RISC architecture is implemented in microcode. A hypervisor enables each core to run its own instance of Linux, or alternatively the whole chip can run Tilera's 64-way SMP (symmetrical multiprocessing) Linux implementation. An 'iMesh' switching interconnect, developed by Tilera's founder, MIT professor and serial entrepreneur Dr. Anant Agarwal, is said to eliminate the centralized bus intersection that limited scalability in previous multicore designs."
I like the idea, I like the idea a lot, but the fact that they opted for a simple but slow topology doesn't fill me with hope. Especially as they suggest running SMP over it. Processors close to the centre of the "mesh" will be resource-starved. There needs to be strong affinity of a given thread to a given core, where the weighting is by the operations expected and where that weighting can (and will) shift as code blocks change or new threads start. In other words, you want something that is semi-static, semi-dynamic according to need. Only the OS is capable of obtaining that kind of information, so it is the OS that needs to do the dividing, NOT the architecture underneath OR a system administrator.
It's a small world and it smells funny; I'd buy another if it wasn't for the money; Take back what I paid (SoM)