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IBM's Eight-Core, 4-GHz Power7 Chip
pacopico writes "The first details on IBM's upcoming Power7 chip have emerged. The Register is reporting that IBM will ship an eight-core chip running at 4.0 GHz. The chip will support four threads per core and fit into some huge systems. For example, University of Illinois is going to house a 300,000-core machine that can hit 10 petaflops. It'll have 620 TB of memory and support 5 PB/s of memory bandwidth. Optical interconnects anyone?"
If your process looks like this:
int main()
{
while (something)
{
doSometing();
}
}
It will hit 100% on one core and that's it. Its not multithreaded - one CPU will churn on it forever and the others will sit around waiting for a task from the OS. 2 course, 200,000 cores the results will be the same. These machines are made for tasks that are broken up into lots of smaller jobs and processed individually. Its not magic - more cores won't get a single threaded process done faster.
Seriously.
The funny thing is that it teeter-totters back and forth from one core to the other. I wish I knew what made it do that.
The OS runs the process a few milliseconds at a time, then kicks the process of the cpu for another process to run (if there is one, including OS tasks such as I/O routines). When the OS starts up the process again for a few more milliseconds, it may start it up on a different core. That is why both cores will show 50% average utilization.
Now if you set CPU affinity for that process to be on one core, then it will max that core out at 100% and the other core will be idle. This may result in better performance, because you get better cache utilization if the process stays on the same core.
On a related topic, this can also be the case if the app is multithreaded -- sometimes it is more efficient to run multiple threads on the same CPU instead of across CPUs, if each thread is accessing the same region of memory. Otherwise, if the threads are on different CPUs or cores, then the threads are constantly invalidating the cache on the other core, causing more (expensive) reads/writes to main memory.
No, each core is running at 4Ghz. That does not total up to 16 Ghz processing power though, because only multithreaded programs can take advantage of more than one core at once, and they still have to wait if they're sharing data.
Aren't a lot of games and apps single-threaded? Hmmm. I figured that dual/quad-core wasn't all it's cracked up to be. So, essentially, if I have a single-threaded app on a quad core, it'll perform at 1/4th the potential speed.
Yes, although, most high end games and game engines actually are multi-threaded. Few are designed to take advantage of more than 2 cores though, and none that I know of will use 8 or 300,000...
So, essentially, if I have a single-threaded app on a quad core, it'll perform at 1/4th the potential speed.
Not necessarily. If you have 3 women can you make a baby in 3 months instead of 9? Given that it still takes 9 months and 2 of the women are idle, would you say that these women are performing at 1/3rd the potential speed? Same sort of logic applies here. If the task is inherently sequential, having more cores (or ladies) won't make it any faster.
Somethings -are- highly parellizable, like ray-tracing or cutting down all the trees in a forest.. and other things are partly parallelizable... like changing tires (a pit crew can change 4 tires at once... but adding more staff to allow you to change 5 tires at once doesn't make your team any faster...)
That doesn't leave me with a warm and fuzzy feeling inside.
Yes, in general computing applications, an 8GHz CPU would be faster than a quad core 2GHz. (And even under optimal parallilizable situations the 2ghz quadcore would just barely surpass the 8ghz cpu due to lower task switching overhead.) So the faster single cpu is almost always better. The reason we have quad core 2Ghz cpus is that they are much much more practical to actually make, and a lot of the stuff that takes a long time (rendering 3d, encoding movies, etc is actually highly parellizable so we do see a benefit. And much of the single threaded sequential stuff we see is waiting on hard drive performance, network bandedith, or user input... so cpu isn't the bottleneck there anyway.
The funny thing is that it teeter-totters back and forth from one core to the other. I wish I knew what made it do that.
If you look at task manager, there what? some 40+ processes running. The OS rotates them onto an off of the 2 cores based on what they all need in terms of cpu time. So your 'cpu heavy task' gets pulled off a core to give another task a timeslice, and then once its off, it can be scheduled back onto either core. Ideally should stay on one core to maximize level one cache hits, etc, but if its been off the core long enough for the other processes to cache all new memory it doesn't really matter which one it gets assigned to, and in any case flipping from one to the other every now and then makes a almost immeasurably small performance difference.
btw - the 'set processor affinity' feature tells the OS that you really want this process to run on a given cpu/core, instead of hopping around. But in most cases its not something one needs (or gains any benefit) from doing.
Correct.
No, they do not "also" have SMT. It is the SMT that gives them 2 threads per core in the first place.
Power 5 & 6 have 2-way SMT. Power 7 has 4-way SMT.
> not to mention, in 2007 that the northwest passage was completely ice free for the first time in recorded history.
Yea, right. Pull the other one. First time in recorded history huh? Except for 1906, 1944, 1957, 1969, 1977, 1984, 1985, 1988 and 2000 in wooden ships, catamarans, naval vessels, cruise ships, etc.
Stop beliving the propaganda and do some googling before you open yer piehole and up looking like a retard.
btw, here is the link I got from Google searching for "northwest passage ice free"
Classically Liberal: Bad reporting about the Northwest Passage issue
Democrat delenda est
I always thought the definition of a "core" as whatever the minimal set of hardware required to run a single thread at "full power". By my logic, anytime you run more than one thread on a core, you're doing what SMT does.
Someone please tell me if I'm wrong (and how).
A core is a set of registers and function units, among other hardware. Each core is, effectively, a completely separate processor (though it likely shares some things, such as the L2 cache and FSB with other cores). Since processor usually refers to a whole chip (encased in a plastic or ceramic package, and soldered on the motherboard), the term "core" refers to when there is more than one inside a single package. The ultimate goal is usually to have all cores on a single piece of silicon, but often multi-chip modules are used (especially early in production), where a four-core processor might contain two silicon dies, each with 2 cores. This can help increase yield (by reducing the die size), and reduce production cost. After improving the yield of the processor, or changing to a reduced feature size (eg 90 nm to 65 nm), a switch back to a single die is possible, reducing the packaging cost.
Simultaneous Multithreading (SMT), on the other hand, works on a single processor/core. It is a feature that allows sharing of the processor resources, such as registers and functional units. A PowerPC 970 (which never had SMT support) could issue 4 instructions and 1 branch every clock cycle. Because of that, plus the deep pipelines, up to 216 instructions can be in various stages of completion at any given time. However, on average, a program branches every 4 instructions - this means that the processor would have to correctly predict 54 branches to keep the pipeline full, AND that the instructions would be (mostly) independent of each other. This isn't easy to do. So, what many processors do is split the available resources. One might issue 2 instructions from one thread and 2 instructions from another in each clock cycle, or alternate clock cycles issuing 4 from one, then 4 from the other. This shares most of the CPU's resources, while requiring a fairly minimal amount of extra logic to track the second thread.
So, cores are extra hardware that can perform more calculations. SMT is taking better advantage of what is already present.
However, the disadvantage of SMT is that it can slow a single-threaded program down, because now it has to share resources. Some processors actually do away with superscalar (aka issuing multiple instructions at once) and out-of-order execution and bypass logic, and instead rotate through many threads. For example, if the pipeline is 8 stages deep and supports 8 threads in hardware, it can issue one instruction from each thread in each clock cycle. Then it never needs to check if an instruction is dependent on an earlier one, because an instruction is completed before the next one from the same program is issued. Having this many threads can also minimize the cost of a branch misprediction, cache miss, or other long-latency events. Also, removing the bypass, dependency checking, multiple-issue, and instruction reordering logic can give a significant reduction in power and area on the chip. The performance hit by these eliminations can then be made up by adding many more cores than you'd see in a superscalar out-of-order processor like a Pentium or Core architecture. The catch is that a processor like this is only faster if you have enough threads to keep the processor busy. However, if your problem is big enough to need a supercomputer, you're darn well going to spend time writing it to take advantage of as many threads as you can.