Japanese Scientists Develop Long-Life Flash Memory

schliz writes "Flash memory chips with a potential lifetime of hundreds of years have been developed by Japanese scientists. The new chips also work at lower voltages than conventional chips, according to the scientists from the University of Tokyo. They are said to be scaleable down to at least 10 nm; current Flash chips wouldn't be usable below 20 nm."

Comments

Read / write cycles

[Dan East]

The summary does not specify exactly what is meant by "long-life". That refers to the current limitation of flash, where individual bits have a physical limitation to the number of times they can be modified. This "new" flash uses some sort of integrated "wear-leveling", so that all bits are utilized equally. Also, when individual bits (or more likely, groups of bits) are worn out they are retired. So instead of a failure, the capacity of the flash would decrease as write cycles exceed the physical limitations. Of course, if wear leveling was performed perfectly, then pretty much the entire array would fail at once, right?

The article doesn't address other important aspects, like read / write speed.

It does say that current flash memory is limited to 10k writes, which is low by at least a factor of 10. Modern flash should withstand at least 100k writes, and I've seen claims of over a million here and there.

Re:Read / write cycles

[xtracto]

A bit of research from the original AIST site bring quite a lot of info.

The from the original tech report:

Shigeki Sakai (Leader) et al. of the Novel Electron Devices Group, the Nanoelectronics Research Institute (Director: Seigo Kanemaru) of the National Institute of Advanced Industrial Science and Technology (AIST) (President: Hiroyuki Yoshikawa) in collaboration with Ken Takeuchi, Associate Professor of the Graduate School of Engineering, the University of Tokyo (Univ. Tokyo) have demonstrated that the use of ferroelectric gate field-effect transistors (FeFETs) as memory cells dramatically improves the performance of NAND flash memory. The FeFET, the newly developed memory cell, can be programmed and erased as many times as 100 million or more and with programming voltage of less than 6 V, whereas the conventional NAND flash memory cells have ten thousand program/erase endurance cycles with approximately 20 V programming voltage. It has been assumed that conventional NAND flash memory can be downsized to 30 nm at the minimum, whereas this novel memory cell will meet the needs of the next 20-nm and 10-nm technology generations. And thus, this memory cell is expected to be used in a next-generation, high-density, high-capacity nonvolatile memory.

Results of the research was reported at the 23rd Nonvolatile Semiconductor Memory Workshop (the 23rd IEEE NVSMW / the 3rd ICMTD 2008) held in France, May 18â"22, 2008.

This is not flash ram

[infolib]

First, the real links. I don't know why the blogger didnt't include them, and I don't think this should have gone on the front page without them. Oh well, there's always the comments...

Novel Ferroelectric NAND Flash Memory Cell Demonstrates 10000 Times More Program and Erase cycles than Conventional Memory Cells (AIST press release, surprisingly science-dense).
Highly Scalable Fe(Ferroelectric)-NAND Cell - contribution to the Non-Volatile Semiconductor Memory Workshop, 2008 (you may have access to only the abstract).

This is NOT flash ram, it's ferroelectric RAM. This doesn't matter much to the consumer who can use it much the same way, but it's a different principle. Apparently they've (semi-)tested 100 million r/w cycles, and expect that it can hold data for 10 years (extrapolated from some curve). Besides, it uses a lower voltage than flash, and they expect it to scale down further. Nice. It even looks like it might work. SSDs for teh win :-)