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Sub-$100 Laptops Have Finally Arrived
Roman Phalanx writes "OLPC had promised that it would be possible to mass produce a sub-$100 laptop. The folks at OLPC tried to realize that dream by re-imagining what a laptop looks like. How large of screen and keyboard it has. What OS runs on the laptop. Now that OLPC has decided to super size their systems to run Windows XP, the $100 price point has slipped beyond their reach. A Chinese firm has realized that dream. Taking the best from both the OLPC and EeePC. They ditched x86 compatibility and switched to a MIPS architecture to further reduce production costs. HiVision has managed to create a UMPC that sells right now for $120.00. They say they have refined the manufacturing process and have learned from building this laptop how to mass produce a laptop that will sell for $98.00." (More below, including a link to a video of the device.)
"The new HiVision MiniNote is due out in October of 2008. TechVideoBlog has footage of one of these Mini Notes being shown off at a trade show in Germany. They have managed to borrow a unit overnight for a while and have done a quick review on it.
Overall it looks pretty good. MIPS based processor, WiFi, 1GB flash storage, it runs Linux, has 3 USB ports, Ethernet, SDHC card reader, audio in and out, multi-tabbed Firefox browser support and Abiword for word processing. Running a custom Chinese Linux distrubution named Xip.
Overall performance seems snappy and no problems connecting to WiFi. Other than the lack of a webcam and the Adobe Flash Player it seems perfect. For $98 it looks like quite a value."
Overall performance seems snappy and no problems connecting to WiFi. Other than the lack of a webcam and the Adobe Flash Player it seems perfect. For $98 it looks like quite a value."
Here is a quick link to a youtube video:
http://www.youtube.com/watch?v=bKQbN6tpYXw
And I promise, it's not a rick rolling.
Gnash already has MIPS support. As this project is actually still moving right along, we can only hope for more. Plus, Gnash already supports YouTube (although it seems people are still having problems).
Bottom line: Thoughts of Adobe supporting Flash on MIPS is a joke. Gnash already supports MIPS but we'll have to wait a little longer for Gnash to support more advanced features.
NOTE: Swfdec also supports MIPS. I have had more luck with Swfdec, and some distros are making it the default free Flash player. Plus, it seems to have more advanced feature supported.
No precompiled apps to download,
Yeah, there's only a little over 20,000 precompiled MIPS packages here. (Well, technically, somewhere in here, with an index located here.) I tend to think that 20,000+ is a little bit more than zero, but maybe that's just me. :)
and $100 is becoming the new $2000
Arrrrrrr
This shows on the YouTube video at 03:58:
400MHz/32bit CPU
128M/64M RAM
1GB NAND Flash
Linux or WinCE
7" 800x480 display
Wireless LAN 802.11b/g
10/100M ethernet
Indeed! Phones and netbooks will help us eradicate Flash from the Web!
No? Have you heard of acronym collisions before?
Millions of Instructions Per Second
vs.
Microprocessor without Interlocked Pipeline Stages
And don't get me started on "POWER"/"PowerPC", because, of course, those terms would never refer to anything other than a CPU architecture...
Slashdot gets worse every day... Pipedot: News for nerds, without the corporate slant
Out of interest, it's a 32-bit XBurst CPU from Ingenic Semiconductors.
http://www.ingenic.cn/eng/productServ/XBurst/pfCustomPage.aspx
Speaking of MIPS, isn't that something you measure x86 chips (or any chips) with? As in millions of instructions per second. I've never heard of an architecture based off a speed rating.
MIPS was one of the first successful manufacturers of a CPU chip with a reduced instruction set (from which of course the RISC acronym arose) as an alternative to the Intel x86 complex instruction set (CISC). The idea was that you could get a faster computer by being able to execute an entire instruction in a single clock cycle, rather than accept the overheads in silicon required by an architecture that takes more than one clock cycle to execute a single instruction. If you can do it in one clock cycle, it means that the whole instruction must fit within the instruction register, that is operation code, address, and any modifying flags that go with it. CISC instruction sets have to make a branch decision based on the opcode as to whether there's more to read into that register before the operation can complete. Less silicon to navigate meant more efficient structures, thus higher speed.
For many years, this worked quite well. Intel had to work very hard to make their CISC instruction set as fast as it is; market forces meant that MIPS couldn't keep up in the prime PC market, thus settled out into the small, high efficiency and inexpensive niche. You still see a lot of embedded systems using RISC chips.
This is also the basis of the controversy you encounter when using the term "MIPS" in it's meaning of "Millions of Instructions Per Second" as a fundamental metric of computer speed -- it's hard to compare a million RISC instructions with a million CISC instructions, in the same way that it's hard to rate an engine by the number of cylinders it has. Myer-Drake Indy cars had a lovely 4-cylinder engine that burned pure alcohol (the "Offenhauser", or "Offy") for many years that had a much higher output than your commercial V8. It's difficult to find a good standard metric some times.
Do not mock my vision of impractical footwear
There are lots of MIPS Linux distros (Main Page), but that doesn't invalidate the GP post. The only apps you get are the ones in the distros. No one compiles for MIPS, since the market is miniscule. This means it is a crap shoot as to whether the source compile works, and you get nothing if the source isn't available. I had the same problem for PowerPC back when I had Linux on my old Mac, and I would wager that PPC is at least a big a market as MIPS would be.
One of my favorite bug hunts was when I found out the implementation difference in varargs between x86 and PPC: in x86, it is a pointer, which means changes in a called function don't propagate, while it is a pointer to a struct on PPC, which means changes do propagate -- thus the missing va_end only affected things on PPC.
I'm fairly certain that none of those Low Cost PC laptops on their site are what this summary is about. First of all, all of those are using VIA C7 processors, not MIPS. And in the linked video he says it has 128MB of RAM. Those also all say Linux/Windows Vista (or XP). While in the video they say it runs either Linux or Windows CE.
The deranged lunacy turned ranged a long time ago.
The core instruction set has had multiple sets of custom enhancements over the years, and can now do some pretty amazing stuff "in a single instruction."
Any x86 CPU you can buy at retail for at least the past three years IS a RISC CPU. x86 is just a compression/encryption format for RISC instructions, and there's not a single thing you can do with an x86 that can't be done on another architecture with similar hardware, and most likely cleaner and better. $50 million worth of R&D into any CPU design, architecture or instruction set will produce a roughly equivalent speedup. Since x86 is such a Charlie Foxtrot in the first place, starting with something cleaner is likely to produce even better performance.
It's the RISC methodology that can no longer keep up except under specific constraints to the problem set. That's why Apple switched to keep up in general-purpose and multimedia computing, and you'll find PowerPC only in embedded and HPC any more.
The only keeping up Apple needs to do is in IA-32 emulation and price. The same principle (commodity hardware means fewer hardware engineers and lower component costs) drove the commodity-based architecture of the Sun Ultra-5. It's ALL about money. It's always about money.
/. -- the Free Republic of technology.
.kr is South Korea (i.e: not communist).