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Intel's Roadmap Includes 4nm Fab in 2022
Precision submits "Intel Corp., the largest maker of chips in the world, has outlined plans to make chips using 4nm process technology in about thirteen years. According to Intel, integration capacity of chips will increase much higher compared to fabrication process."
They're looking at moving away from using silicon as a substrate. I can't remember if artificial diamond or something else is the proposed replacement.
I don't read AC A human right
Silicon's radius is 110 picometers which translates to .11 nanometers.
Except for the fact that a lot of the 'marketing dweebs' at tech companies are engineers.
Just sayin'. Your product management/marketing folks at these firms are often very plugged in to the tech side of things (I should know, being one of them).
Forget about the limitations of die shrink, what about the limitations of quantum mechanics? I was under the impression that 4 nm is getting awefully close to the point where quantum tunneling makes tansistors unworkable. As in, when you detect a signal, you can't tell if it's there because it should be or because an electron just jumped the gap.
The atomic radius is not the proper distance to consider. If you do so, you assume that atoms can touch each other, which is very far from the truth. The closest distance "allowed" is the first nearest-neighbor (NN), which is related to the crystal lattice constant (for Si: 0.543 nm), and the crystal structure (Si has a diamond structure). For Si that NN distance is 0.235 nm. This is all very much academic tough. Even if you could make a circuit that small, you would then have to wonder, left alone quantum-size effects, leakage, behavior under oxidation, etc.
There have been formal semiconductor roadmaps to the future since 1992. There's an consensus roadmap updated annually by an industry group.
This isn't a blue-sky thing. It tells all the players what they need to do to keep up their part of the technology. The fab-equipment people, the device physics people, the etching people, the mask people, the substrate people, the design tools people, etc. all have to push their parts forward. The roadmap tells them how far each piece has to be pushed.
These roadmaps are available for past years, and you can see how the industry has tracked the roadmap. It's reasonably close for any five year period. The big change in the last decade is that heat dissipation is starting to dominate the problem. The roadmap now focuses on memory devices, which have low activity per cell compared to compute elements and aren't yet power-limited.
The current consensus is that the improvements to known technology can get down to 22nm, and then it gets hard. The roadmap assumes CMOS transistors; other devices are discussed, but aren't factored into the mainline predictions.