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MIT's Hybrid Microchip To Overcome Silicon Size Barrier
schliz writes "MIT researchers have successfully embedded a gallium nitride layer onto silicon to create a hybrid microchip. The method could be further developed to combine other technologies such as spintronics and optoelectronics on a silicon chip. It is expected to be commercialized in a couple of years, and allow manufacturers to keep up with Moore's Law despite today's shrinking devices."
It's been getting interesting these past couple of years to see chip manufacturers not only content with observing the results of Moore's Law, but working hard to actually meet it as a self-imposed deadline. Would Intel have come as far as it did recently if Moore had never put his famous observation onto paper?
Smaller equals faster, and can equal lower power. Both of these are good for cellphones, and lots of other things.
More to the point, this particular advance means fewer individual chips, which means cheaper.
Imagine a Beowulf cluster of those... in my smartphone.
Eventually the smartchip in your credit card will get bored, nano-build a wifi connector out of the card's polymers and connect to the net, building its own Facebook page and getting more friends than you have. And then Skynet wins teh interwebs.
i should get my girlfriend to use silicon to overcome her size barrier.
Utilizing the synergization of benchmark e-solutions to pre-workaround action items!
I hear a lot about the "exponential" growth of technology. I'm not sure whether technology is really growing exponentially, but I do know this: exponentially growing processes don't go on forever - they can't. Rather quickly, they hit upon some underlying limitation in the physical world, and progress stops. I think it's much more likely that growth in technology follows a logistic curve, which grows pseudo-exponentially for a while, but then plateaus. We're just in the steep part of the curve right now.