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Next Gen Intel CPUs Move To Yet Another Socket

Posted by CmdrTaco on from the consistency-is-stupid dept.

mr_sifter writes "According to a leaked roadmap, next year we'll be saying hello to LGA1155. The socket is 1-pin different from the current LGA1156 socket Core i3, i5, and some i7s use. Sandy Bridge CPUs will be based on the current 32nm, second-generation High-k metal gate manufacturing process. All LGA1155 CPUs will have integrated graphics built into the core instead of a separate chip. This is an upgrade from the current IGP, PCI Express controller and memory controller in Clarkdale CPUs. which is manufactured on the older 45nm process in a separate die (but still slapped together the same package). This should improve performance, as all the controllers will be in one die, like existing LGA1366 CPUs."

6 of 254 comments (clear)

  1. Re:Sigh by MrNaz · · Score: 4, Interesting

    There's always AMD's Fusion on the horizon. If they can execute well on that they have a chance to do what they did with the Athlon. Intel has yet to demonstrate that they actually have GPU tech that can compete with nVidia and ATI in this space. I really hope they do, Intel has had too long at the top of the market and they're getting all monopolistic again.

    --
    I hate printers.
  2. Re:Figures... by zach_the_lizard · · Score: 5, Informative

    You've had to do this for a while. Don't you remember having to get a new motherboard to use newer CPUs, even though they had the same socket? Yeah, I do. That was very confusing at times, and at least with a new socket, you will have a better chance of knowing what will / will not work.

    --
    SSC
  3. And yet,... by Pojut · · Score: 5, Informative

    ...the AM2+/AM3 socket on my AMD board continues to be useful for new AMD CPUs literally years after I originally purchased it.

    --
    Living With a Nerd
  4. A win for AMD by Albanach · · Score: 5, Insightful

    I can't understand why they would force another socket design on customers. I am using a four year old motherboard and recently replaced my AMD CPU with a current model. It was a drop in replacement. Sure I could get some benefits from a newer MB, but I can make the upgrade at a time of my choosing. I can spread the cost, get the big boost from the CPU now and get a smaller boost from a new MB in a year's time.

    Board manufacturers have to spend money implementing the new socket. Retailers are stuck with old stock that no-one wants because a new socket is around the corner.

    It raises prices and hurts the end user. Why are we still seeing this behavior?

    1. Re:A win for AMD by PhrstBrn · · Score: 4, Insightful

      Because Intel sells motherboards and chipsets too. They don't want to sell you just a new processor, they want to sell you a new processor and a motherboard.

      If Intel thought they could make more money by keeping their stuff backwards compatible, they would, but I'm sure the bean counters figured the amount of sales lost to AMD would be less than the profits they could make by forcing you to buy new motherboards too, and I would tend to agree with that.

      I don't like it, I don't think it's good for consumers, but it makes sense from Intel's perspective.

  5. Re:Integrated graphics in the CPU? by marcansoft · · Score: 5, Informative

    The key is modern RISC, not RISC. x86 is horribly inefficient. I'm not talking about the instruction decoder, I'm talking about the instruction semantics. x86 was never designed for today's high-performance CPUs, and the result is that the instruction set basically allows the programmer to do anything they want, even if it goes against modern CPU design optimizations. This forces the CPU to devote a large amount of die area to workaround logic that detects the thousands of possible dirty tricks that a programmer might use which are allowed by the ISA. For example, every modern RISC requires that the programmer issue cache flush instructions when modifying executable code. This is common sense. x86 doesn't, which means there needs to be a large blob of logic checking for whether the data you just touched happens to be inside your code cache too. The fact that on x86 you can e.g. use one instruction to modify the next instruction in the pipeline is just so ridiculously horribly wrong it's not even funny. There are similar screw-ups related to e.g. the page tables. I can't even begin to imagine the pains that x86 CPU engineers have to go through.

    You can make an x86 chip reasonably small and very slow, or very large and very fast. x86 doesn't let you have it both ways to any reasonable degree.