Engineers Create Tiny Wires WIth Old Technique

Gamp writes with this interesting snippet: "As microprocessors have shrunk, the wiring between them hasn't always kept up. But engineers at the University of Illinois are changing that with a decades-old metalworking technique. It's called electrodeposition. It's basically the same process used in electroplating, but instead of depositing metal on a surface, as when trying to make a gold-plated piece of jewelry, the metal is deposited in a wire. 'People weren't thinking about how to fabricate a wire in three dimensional space,' said Min-Feng Yu, a professor of mechanical science and engineering."

Comments

link to (unfortunately, paywalled) paper

[Trepidity]

I hate it when news articles don't either link to the original scientific paper, or at the very least tell me what issue of what journal it was published in! Given the state of journalism-about-scientific-research, I like checking up on the original paper, either for more details, or for a better "related work" section (often the actual papers will be much more honest than the press releases about which parts of the work are new and which parts aren't, and how it relates to existing work).

Anyway, it's this:

Jie Hu and Min-Feng Yu (2010). Meniscus-Confined Three-Dimensional Electrodeposition for Direct Writing of Wire Bonds. Science 329(5989): 313-316.

Re:transistor density

[JoshuaZ]

Any impact on Moore's Law?

Well, according to TFA:

Scaled up to industrial size, the method could save microprocessor companies a lot of money, Yu said, because about 30% of the space in a microchip wafer is taken up by the wires between components

Given that, I'm going to tentatively answer your question with a "yes."

Re:transistor density

[Trepidity]

Technically a bit different issue than the way Moore phrased it, but conceptually could have some related effects. Moore was predicting an increase in transistor density of integrated circuits (ICs), while this work scales down the size of interconnects between separate ICs. That could have the same effect of increasing overall transistor density for an electronic component, but is a somewhat different than increasing transistor density within a single IC. For example, it won't allow CPUs to pack transistors more densely, because CPUs are already a single IC.

Article with pictures

[simula]

For anyone interested in seeing what the results of this technique create, check out the NewScientist article that covers the same topic:

http://www.newscientist.com/article/dn19181-growyourown-approach-to-wiring-3d-chips.html