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Help Build the World's First Community-Funded CPU ASIC

An anonymous reader writes "The 32-bit OpenRISC CPU has been available for many FPGAs and was turned into a commercial ASIC in 2003. Now, the OpenCores community is asking for donations to create a new ASIC with the OpenRISC CPU, ethernet, PCI, UART, USB and other peripherals. The goal is to be able to sell these ASICs at a low price to anyone who wants to build a cheap embedded system built completely on open source. The OpenRISC currently runs on Linux 2.6.37 and has ports of gcc 4.5.1 among other things."

140 comments

  1. Free at last by olof_k · · Score: 5, Insightful

    This is a milestone in open source history. No more complaining about undocumented behaviour that causes drivers to crash. It's just to download the RTL code and see for yourself what is going on. If this catches on, the chances of building truly open systems greatly improves. Go OpenCores!

    1. Re:Free at last by Anonymous Coward · · Score: 0

      You can buy a Milkymist One for this, we are shipping today.
      http://www.milkymist.org

    2. Re:Free at last by nurb432 · · Score: 1

      You do know the difference between ASIC and FPGA, right?

      The story is about ASIC, which isn't exactly trivial. Doing a FPGA implementation of OR1/2k is a non-event.

      --
      ---- Booth was a patriot ----
    3. Re:Free at last by Anonymous Coward · · Score: 0

      Sparc has been open since start when it comes to specifications, and the Verilog code has been open for many years.
      Sparcs was made and designed by many companies in the past due to that but the competition from Sun was to hard.

      Opencores is a private held swedish company today making money by ads and consultants, it is not a .org company like opencores once was and this was
      a great ad!!

      You cant make chips like that, this is a smart ad by them simple as that.

    4. Re:Free at last by olof_k · · Score: 1

      Sparc has been open since start when it comes to specifications, and the Verilog code has been open for many years.

      Yes, that is true, but this is an attempt to produce a complete open source SoC as an ASIC, not just the CPU.

      Opencores is a private held swedish company today making money by ads and consultants, it is not a .org company like opencores once was and this was a great ad!!

      I think you confuse things here. The opencores servers are paid for by ORSoC. Opencores itself is the same as it always has been. Kind of like a sourceforge for HDL code. The ASIC project is partially funded by ORSoC as you can see on the donations page.

      You cant make chips like that

      I don't understand what you mean by that? This is exactly what opencores is trying to do

    5. Re:Free at last by blair1q · · Score: 2

      Wait. Are you saying that just because it's open source, it's fully documented? ...

      Pardon me while I pick up my lung.

    6. Re:Free at last by Anonymous Coward · · Score: 0

      It's just to download the RTL code and see for yourself what is going on.

      I build SoCs for a living, that run Linux. Replicating a Linux driver crash in RTL simulation is intractable. The closest we can get is using emulation platforms(such as EVE) that 'run' RTL on specialized ASICs capable of running at about 5% of the target frequency AND can dump waveforms. Typically we only do this after we've exhausted software-only approaches since those run at full speed.

      I looked at the OpenRISC ASIC plan from the website and it is grossly incomplete. Working RTL pieces are the easy part. Getting 100+ clocks, 5+ power domains, DFT, memories and broken tools to all play together in a floorplanned netlist is the hard part. The fact that they don't have any DFT, testing or packaging plan makes me wonder if they've taken a serious look at the economic factors here.

  2. Isn't SPARC open source? by Anonymous Coward · · Score: 5, Interesting
    1. Re:Isn't SPARC open source? by olof_k · · Score: 1

      There are a number of open source CPU cores, most notably are probably Leon and opensparc. I'm not sure, however if the OpenSPARC has been turned into an ASIC.

    2. Re:Isn't SPARC open source? by Anonymous Coward · · Score: 3, Funny

      I found a link to "Download the only free 64-bit micro processors". How do I install that in my MoBo? I'm running Vista.

    3. Re:Isn't SPARC open source? by michelcolman · · Score: 1

      Mod parent funny! (I hope...)

    4. Re:Isn't SPARC open source? by TheRaven64 · · Score: 4, Funny

      There used to be a small company that produced the OpenSPARC chips. I can't remember what they were called - Star? Solar? Something like that. Anyway, they were bought by some database company a while ago, and they still make those chips.

      --
      I am TheRaven on Soylent News
    5. Re:Isn't SPARC open source? by julesh · · Score: 1

      There are a number of open source CPU cores, most notably are probably Leon and opensparc. I'm not sure, however if the OpenSPARC has been turned into an ASIC.

      I'm pretty sure it has been. The design is more suited to that application than FPGA synthesis (it's quite large, compared to what you can fit on most affordable FPGAs). Synopsys's ASIC design software includes modules derived from it for reuse on users' circuits; I'd be surprised if nobody had actually implemented something they'd designed using it.

    6. Re:Isn't SPARC open source? by mr_mischief · · Score: 1

      Fujitsu what?

    7. Re:Isn't SPARC open source? by ppc_digger · · Score: 2

      Fujitsu never implemented OpenSPARC. They developed the SPARC64 themselves, and the UltraSPARCs in their machines are manufactured by Oracle.

      --
      Of all major operating systems, UNIX is the only one originally meant for gaming.
    8. Re:Isn't SPARC open source? by DaMattster · · Score: 1

      This looks very cool but who makes a motherboard capable of the processor? It is one thing to have the processor but without a complete motherboard, it is just one expensive trinket.

    9. Re:Isn't SPARC open source? by mr_mischief · · Score: 1

      Snippets from Wikipedia:

      SPARC International was intended to open the SPARC architecture to make a larger ecosystem for the design, which has been licensed to several manufacturers, including Texas Instruments, Atmel, Cypress Semiconductor, and Fujitsu. As a result of SPARC International, the SPARC architecture is fully open and non-proprietary.

      In March 2006, the complete design of Sun Microsystems' UltraSPARC T1 microprocessor was released-in open-source form at OpenSPARC.net and named the OpenSPARC T1. In 2007, the design of Sun's UltraSPARC T2 microprocessor was also released in open-source form, as OpenSPARC T2; see OpenSPARC.net.
      As of June 2009 the SPARC design was used by Fujitsu Laboratories Ltd. to create the processor product named Venus SPARC64 VIIIfx which is capable of 128 billion floating point operations per second (128 GFLOPs).

      There have been three major revisions of the architecture. The first published revision was the 32-bit SPARC Version 7 (V7) in 1986. SPARC Version 8 (V8), an enhanced SPARC architecture definition, was released in 1990. The main differences between V7 and V8 were the addition of integer multiply and divide instructions, and an upgrade from 80-bit "extended precision" floating-point arithmetic to 128-bit "quad-precision" arithmetic. SPARC V8 served as the basis for IEEE Standard 1754-1994, an IEEE standard for a 32-bit microprocessor architecture.
      SPARC Version 9, the 64-bit SPARC architecture, was released by SPARC International in 1993. It was developed by the SPARC Architecture Committee consisting of Amdahl Corporation, Fujitsu, ICL, LSI Logic, Matsushita, Phillips, Ross Technology, Sun Microsystems, and Texas Instruments.
      In 2002, the SPARC Joint Programming Specification 1 (JPS1) was released by Fujitsu and Sun, describing processor functions which were identically implemented in the CPUs of both companies ("Commonality"). The first CPUs conforming to JPS1 were the UltraSPARC III by Sun and the SPARC64 V by Fujitsu. Functionalities which are not covered by JPS1 are documented for each processor in "Implementation Supplements".
      In early 2006, Sun released an extended architecture specification, UltraSPARC Architecture 2005. This includes not only the non-privileged and most of the privileged portions of SPARC V9, but also all the architectural extensions (such as CMT, hyperprivileged, VIS 1, and VIS 2) present in Sun's UltraSPARC processors starting with the UltraSPARC T1 implementation. UltraSPARC Architecture 2005 includes Sun's standard extensions and remains compliant with the full SPARC V9 Level 1 specification.
      In 2007, Sun released an updated specification, UltraSPARC Architecture 2007, to which the UltraSPARC T2 implementation complied.
      The architecture has provided continuous application binary compatibility from the first SPARC V7 implementation in 1987 into the Sun UltraSPARC Architecture implementations.
      Among various implementations of SPARC, Sun's SuperSPARC and UltraSPARC-I were very popular, and were used as reference systems for SPEC CPU95 and CPU2000 benchmarks. The 296 MHz UltraSPARC-II is the reference system for the SPEC CPU2006 benchmark.

      Snippet from SPARC International:

      SPARC Architecture License

      $99.00 Administration fee
      Available to anyone, royalty free, gives developers the right to design, manufacture and freely market components conforming to the SPARC Architecture. Contact: sparcinfo@sparc.org for architecture license.

      Okay, so $99 for a royalty free license isn't exactly pure open source.

    10. Re:Isn't SPARC open source? by Anonymous Coward · · Score: 0

      What does the Device Stage show you when you plug the thing in you MoBo? Since I'm thinking Device Stage as the homepage for your hardware, it should contain the necessary information for .. Oh crap, you are using Vista. I can't help you.

    11. Re:Isn't SPARC open source? by mr_mischief · · Score: 2

      Damnit.. didn't mean to hit submit yet...

      The actual exact implementation of a particular SPARC might not be completely open, but they are all built against an open spec to be called "Sparc". That's a far cry from x86 or POWER.

  3. I'm holding out for a home chip fab kit by Anonymous Coward · · Score: 0

    How else could I be sure that the chips they sell are compiled from the published source?

    1. Re:I'm holding out for a home chip fab kit by nurb432 · · Score: 2

      Then use a FPGA and program it yourself.

      --
      ---- Booth was a patriot ----
  4. Runs on? by bcmm · · Score: 1

    Pretty sure Linux runs on a CPU, rather than the other way around.

    --
    # cat /dev/mem | strings | grep -i llama
    Damn, my RAM is full of llamas.
    1. Re:Runs on? by maxwell+demon · · Score: 2

      Pretty sure Linux runs on a CPU, rather than the other way around.

      Unless the CPU is emulated. Then it might run on Linux.

      --
      The Tao of math: The numbers you can count are not the real numbers.
    2. Re:Runs on? by blair1q · · Score: 1

      If it's done in an ASIC, it's almost certainly got an HDL model that has been run on Linux.

    3. Re:Runs on? by VortexCortex · · Score: 1

      Pretty sure Linux runs on a CPU, rather than the other way around.

      Unless the CPU is emulated. Then it might run on Linux.

      ...and if the CPU emulator is loaded within that emulator, it runs on itself.

  5. A little outdated don't you think by Billly+Gates · · Score: 1

    Why can't the opensource community build a more up to date one that is 64-bit with built in GPU. That would be nice for tablets

    1. Re:A little outdated don't you think by olof_k · · Score: 1

      The OpenRISC spec supports 64-bit, but the current implementation is 32 bit. I agree with the GPU part. There is a cool project that has built a FPGA-based graphics card http://wiki.opengraphics.org/ . One problem with the open source hardware community is that it is a bit fragmented. Would be awesome to combine a lot of the efforts.

    2. Re:A little outdated don't you think by Anonymous Coward · · Score: 1

      If you hand 20-year monopolies to people like candy, then anyone else building something similar will be illegal or 20 years behind.

    3. Re:A little outdated don't you think by Anonymous Coward · · Score: 0

      The open source community, in general, is a bit fragmented. KOffice, Abi, Open/Libre/whatever the fuckOffice

    4. Re:A little outdated don't you think by Anonymous Coward · · Score: 0

      Well, answer me this: why can't you build a more up to date one that is 64-bit with built-in GPU?

    5. Re:A little outdated don't you think by AdamHaun · · Score: 1

      This looks like an embedded microcontroller, in which case 32-bit is already very high-end. You realize all that Arduino stuff is based on an 8-bit CPU, right? Modern high-speed 64-bit CPUs are very difficult to design and expensive to fabricate.

      --
      Visit the
    6. Re:A little outdated don't you think by inglorion_on_the_net · · Score: 1

      Why can't the opensource community ...

      It's not that we can't, we just haven't. Perhaps there isn't enough interest. Speaking for myself, I designed a CPU once, and concluded it wasn't for me. I'm a software guy.

      If you want open source 64-bit CPUs with built-in GPUs, by all means go and start the project. It will work if the necessary effort is put in, and it won't have to be all your effort if you can motivate others to help out.

      --
      Please correct me if I got my facts wrong.
    7. Re:A little outdated don't you think by Anonymous Coward · · Score: 0

      www.ohwr.org is another effort to bring open hardware projects together

    8. Re:A little outdated don't you think by olof_k · · Score: 1

      There is also the problem that for every hardware designer, there are probably more than a hundred software designers. There are so much stuff we would like to do, but there isn't enough time

    9. Re:A little outdated don't you think by Svartalf · · Score: 1

      The CPU's not really the hard part... The GPU is...

      --
      I am not merely a "consumer" or a "taxpayer". I am a Citizen of the State of Texas
  6. GNU Electric by Script+Cat · · Score: 2

    GNU electric is used to design ASICs. You need a good set of standard cells and a synthesis tool. Then you write the logic in VHDL or verilog.

  7. Price? by Compaqt · · Score: 2

    I applaud the effort, and I hope it succeeds. The community ought to have its own hardware.

    But I hope the prices are a little less than those of OpenMoko and friends (BeagleBoard, FreeRunner, etc.) have been.

    --
    I'm not a lawyer, but I play one on the Internet. Blog
    1. Re:Price? by olof_k · · Score: 1

      The price will probably depend a lot on the fab method, but the goal is to make it cheap and available. The main difference between this and beagleboard/arduino/freerunner is that they are all closed source ASICs. This is both a philosophical difference (Yeah! It's open source) and a practical (I wonder why the CPU is acting strangely, Oh well, I just have to look at the source code)

    2. Re:Price? by zill · · Score: 1

      But I hope the prices are a little less than those of OpenMoko and friends (BeagleBoard, FreeRunner, etc.) have been.

      $150 for a system powerful enough to run desktop linux and you're still complaining it's too expansive?

    3. Re:Price? by Man+On+Pink+Corner · · Score: 1

      (I wonder why the CPU is acting strangely, Oh well, I just have to look at the source code)

      And by "source code" you mean "data sheet" or "manual," right?

      It's funny... just as nobody is better at finding compiler 'bugs' than a beginning C programmer, it sounds like nobody is better at finding CPU bugs than Slashdotters.

    4. Re:Price? by olof_k · · Score: 1

      No, I mean isolating the problem and running the RTL code in a simulator.

    5. Re:Price? by QuantumLeaper · · Score: 1

      The system I am currently running Linux on, I pulled from the Trash. It even included a monitor, but no cable for the monitor. It a P4 3GHz, 512M with a 320G HD, the bonus was some music, but most of the was crappy Country music and I don't mean Country is crappy, just their chose in music. So yes, $150 is expensive.

  8. Re:Nice by Anonymous Coward · · Score: 0

    That's racist. Please use the term "negroes" or "colored brothers".

  9. OK, I'll Say It by mprinkey · · Score: 1

    This is stupid.

    I am a big proponent of open-source software. I like the idea of being able to build my own versions of software, fixing bugs and adding features. I use it as a key component of my business. It is great. Moreover, most of the code that me or my employees write is or likely one day will be open source.

    However...open hardware is a fundamentally different thing. No one has chip fabs in their basement. So someone will have to pay big money to make the masks and tape-out and test the hardware. Unless some major vendor picks up the design and mass produces it lots of 100s of thousands, the price per CPU is going to be stupidly more expensive than an off-the-shelf CPU/motherboard or embedded system. And, even then, you are probably buying an overpriced, underpowered CPU just because it is "free."

    This is Stallmanism as its worst--"freedom" for freedom's sake without regard to functionality or practicality. Stuff like this casts a shadow of crazy.

    1. Re:OK, I'll Say It by Bryan3000000 · · Score: 4, Informative

      You don't understand. Chip fabricators will fabricate custom designed chips. Many companies have this done. Apple used to do it until they brought it in-house, and they still do for many components. If the design is actually completed and manufacturable, the only limit on price is the quantity of the order. This project can actually do what it intends.

    2. Re:OK, I'll Say It by Tapewolf · · Score: 1

      However...open hardware is a fundamentally different thing. No one has chip fabs in their basement. So someone will have to pay big money to make the masks and tape-out and test the hardware. Unless some major vendor picks up the design and mass produces it lots of 100s of thousands, the price per CPU is going to be stupidly more expensive than an off-the-shelf CPU/motherboard or embedded system.

      I remember reading somewhere about companies that will actually do short runs of chips for you. Memory is hazy, but IIRC it's typically done on a process several generations behind using older equipment that would probably be idle otherwise. I think what they do is stick different customers' parts on the same wafer or something like that... Wish I could remember where I heard about it.

    3. Re:OK, I'll Say It by Anonymous Coward · · Score: 0

      Is that you Bill Gates?

    4. Re:OK, I'll Say It by olof_k · · Score: 2

      No one has chip fabs in their basement. So someone will have to pay big money to make the masks and tape-out and test the hardware.

      This is why opencores is asking for donations

      Unless some major vendor picks up the design and mass produces it lots of 100s of thousands, the price per CPU is going to be stupidly more expensive than an off-the-shelf CPU/motherboard or embedded system.

      Not necessarily. Of course, the more chips that are produced, the cheaper they get, but this is also a non-profit effort, so if you are looking to buy low quantities, it might be cheaper than commercial offerings

    5. Re:OK, I'll Say It by TheRaven64 · · Score: 1

      Depends on the process. If you're happy with something a few generations out of date, it can be relatively cheap. I looked at it a few years ago with regard to the OpenSPARC stuff, and there were companies that would produce small runs surprisingly cheaply. You only need around 100-1000 for the per unit price to be expensive, rather than unaffordable.

      The most important use, however, is companies wanting to produce their own SoC. Typically, they'll license a core from ARM, add some other things specific to their requirements, and then get it fabbed. Doing this with OpenRISC will cost as much to produce, but they don't have to pay ARM for the license.

      --
      I am TheRaven on Soylent News
    6. Re:OK, I'll Say It by Anonymous Coward · · Score: 0

      ... most of the code that me or my employees write...

      You wouldn't write "most of the code that me write". It is also customary to put others before yourself in a list.

      ... most of the code that my employees and I write...

      Besides, open source hardware does make sense for large (but relatively small) manufacturers. There are small niches where an open source commons can result in price savings, even in hardware.

    7. Re:OK, I'll Say It by NEDHead · · Score: 1

      I call for an open source project to provide low cost state of the art home chip fabs. That should solve the problem.

    8. Re:OK, I'll Say It by AdamHaun · · Score: 2

      I think you're talking about MOSIS.

      http://www.mosis.com/

      --
      Visit the
    9. Re:OK, I'll Say It by TeknoHog · · Score: 1

      However...open hardware is a fundamentally different thing. No one has chip fabs in their basement.

      And the reason is that FPGAs are cheap and much more fun.

      --
      Escher was the first MC and Giger invented the HR department.
    10. Re:OK, I'll Say It by Arlet · · Score: 1

      Commercial 32 bit CPU chips are also very cheap. There's plenty of choice in the sub-$10 price range. Since every user a different requirements, it's hard to make an open source ASIC that they all want in sufficient quantities.

      And who will guarantee the design will be continued after the first batch ?

    11. Re:OK, I'll Say It by mr_mischief · · Score: 1

      AMD used to fab chips, and sent some work to TSMC or IBM. Now they've spun off Global Foundries and still use TSMC.

      So, yeah, I see your point about companies doing custom fabs for other companies.

    12. Re:OK, I'll Say It by Bengie · · Score: 1

      Intel is leasing out 22nm fabs for FPGAs.

    13. Re:OK, I'll Say It by mr_mischief · · Score: 1

      FPGAs are cheap in smaller quantities. Once you scale up ASIC production the per-unit cost falls well below FPGA chips and they're much faster.

    14. Re:OK, I'll Say It by TeknoHog · · Score: 1

      True, but my point was that open hardware designs are interesting since you can use FPGAs to play with them. I am personally excited by the possibilities of trying out different designs on my own desktop. The hardware may be slower, but it won't take ages and millions to get a working prototype.

      --
      Escher was the first MC and Giger invented the HR department.
    15. Re:OK, I'll Say It by TheRaven64 · · Score: 1

      And who will guarantee the design will be continued after the first batch ?

      That's part of the point of an open source chip - and the reason that Sun open sourced the T1 and T2 designs. If you have a product that's built around this chip, then you can always get more, as long as there remain companies with fabs that produce chips from their customers' designs. You're never in the position of NASA, having to hunt for second-hand 8086s because they aren't produced anymore and the original supplier isn't interested in doing a low-volume run. They may be expensive, but they won't be unavailable. The time when it's not economically feasible to stick with the architecture is decided by you, not the supplier.

      --
      I am TheRaven on Soylent News
    16. Re:OK, I'll Say It by Arlet · · Score: 1

      Sure, you can always get more, but they may be very expensive, if you need only small quantities.

    17. Re:OK, I'll Say It by mr_mischief · · Score: 2

      The key word is prototype. Once you have chosen the prototype, you can go to production with it. That's what this project is about. They are trying to find enough people who want this prototype that has been in FPGAs for a long time to go to larger-scale production with a higher speed chip as a result. Keep using FPGAs to figure out the core you want (or to play with as many as you want), but if you decide to put it into a mass-market item, an ASIC is probably the way to go.

    18. Re:OK, I'll Say It by olof_k · · Score: 2

      Yes, it might be expensive to manufacture small quantities, but availability is the key here. The space industry has learned it's lesson, and that's why they are interested in open source CPUs like LEON and OpenRISC

    19. Re:OK, I'll Say It by TheRaven64 · · Score: 1

      Less expensive than you might think. You can do small runs for around $10K (last time I looked was a few years ago, prices may have changed since then), and that's typically far less than the cost of rewriting your software stack for a new architecture and testing it for regressions.

      --
      I am TheRaven on Soylent News
    20. Re:OK, I'll Say It by Anonymous Coward · · Score: 0

      Is the chip truly open if it is made in a proprietary fab?

      We need 'open' fabs too!

    21. Re:OK, I'll Say It by FlyingGuy · · Score: 1

      Sorry, that's a dumb question even for /.

      --
      Hey KID! Yeah you, get the fuck off my lawn!
    22. Re:OK, I'll Say It by Anonymous Coward · · Score: 3, Informative

      No, you don't understand.

      From the GP:

      No one has chip fabs in their basement. So someone will have to pay big money to make the masks and tape-out and test the hardware. Unless some major vendor picks up the design and mass produces it lots of 100s of thousands, the price per CPU is going to be stupidly more expensive than an off-the-shelf CPU/motherboard or embedded system. And, even then, you are probably buying an overpriced, underpowered CPU just because it is "free."

      Repeat this until reality sinks in. He's not saying that chip fabricators won't fabricate custom chips. He's saying that the cost of getting them to do so is prohibitive. If your order volume is small, the fixed costs will eat you alive.

      As for the project doing what it intends... the mission statement on the beg-for-donations page linked up above is full of monumentally dumb claims about how this is could revolutionize the industry and make the multinational giants quake in their boots. Yeah, right. The "multinational giants" and even the smaller players are busy working on chips which have reasonable technical specs for 2011 and beyond. These guys are making a trailing-edge toy which will have little appeal outside the niche of "people who must have everything in their computing lives approved by RMS".

      Allow me to support that assertion. I've looked at the "detailed" technical plan, which is anything but detailed. There is a block level view of what's going in, which is mostly off-the-shelf OpenCores cores, but there are no detailed plans about how this is going to be translated into an actual ASIC design. There are only plans for making a FPGA based development platform.

      Don't get me wrong, a FPGA platform is a good thing to do. A project like this won't have the resources to do very much design validation through simulation (which requires lots of people writing tests and running sims, i.e. real money), so FPGA based prototyping and validation is even more important than it is for conventional "closed source" ASIC projects. However, there is no plan given for how they're going to take their working FPGA design and turn it into an ASIC design. There isn't even any mention of which fab vendors and processes they're thinking of targeting. (and yes, these things matter immensely when you're making a chip.)

      It's somewhat revealing that they're using a single small Altera Cyclone IV FPGA (under $60 qty 1 through Digikey). If you don't understand the significance, this means their design is tiny and trivial and low tech by current standards. The big boys they're planning to make quake in their boots need multiple ~$5K to $10K ea. FPGAs (big ones with well over 10x the resources of the FPGA the opencores guys are using) to fit all the logic in their upcoming System-on-Chip ASIC designs.

      I suspect that if fully laid out their plan is something like "Build the FPGA version, and surely the ASIC guys will come knocking on our door with money to translate our awesome design into a chip!" But this will never happen, because their FPGA design is years behind the state of the art. They're competing against hordes of low cost chips which already do the same things and have already paid back their cost of development.

    23. Re:OK, I'll Say It by artor3 · · Score: 2

      Unfortunately, this project doesn't look to be completed or manufacturable. In fact, it looks like all they have is some HDL. Do they know what process technology they're going to use? Have they done any layout work? Did they do so with manufacturability in mind? Have they given thought to test modes? Do they have anyone to develop a test program?

      Making a chip is hard. Even if you have all the IP, you're still looking at hundreds of thousands of dollars to develop a thorough test program and work out all the chip's kinks. Sure, you can just hand over the mask set to a foundry and buy the wafers, but then you have thousands of chips and no way of knowing which ones work, or how well.

    24. Re:OK, I'll Say It by olof_k · · Score: 1

      If your order volume is small, the fixed costs will eat you alive.

      ...which is why opencores is asking for donations

      There is a block level view of what's going in, which is mostly off-the-shelf OpenCores cores, but there are no detailed plans about how this is going to be translated into an actual ASIC design.

      1. Push ASIC button

      2. Profit

      Just kidding :) The CPU itself has been turned into ASICs before, so most of the code is in a good shape. The rest is implementation details and will probably be worked out when the ASIC vendor is chosen.

      There are only plans for making a FPGA based development platform.

      Don't get me wrong, a FPGA platform is a good thing to do. A project like this won't have the resources to do very much design validation through simulation (which requires lots of people writing tests and running sims, i.e. real money), so FPGA based prototyping and validation is even more important than it is for conventional "closed source" ASIC projects. However, there is no plan given for how they're going to take their working FPGA design and turn it into an ASIC design.

      Verification is always the largest issue when you are building complex systems. One of the benefits of open source however, is that someone might have done it before you. In the case of the OpenRISC CPU, the 80000 (correct me if I'm wrong) regression tests of GCC is being used as one source of verification stimuli. Keep in mind also that the design isn't being created from scratch. The core is about ten years old

      It's somewhat revealing that they're using a single small Altera Cyclone IV FPGA (under $60 qty 1 through Digikey). If you don't understand the significance, this means their design is tiny and trivial and low tech by current standards.

      This isn't an effort to create the next-generation-273-bit-mega-hyper-threaded-with-DDR-5-and-379-core-subpixel-shader-gpgpu on crack. It's a fairly standard 32 bit RISC SoC, with the main difference that the RTL code is open source, and that the ASIC will be sold at a low cost even in low quantities. Think of how popular the Arduino platform is for example. It has some extra street cred, because the layout is open source. Now this is taken one step further, by using a LGPL:d CPU and peripherals. The quaking-in-their-boots part sounds a bit exaggerated, but still, it is primarily because this hasn't been done before. And if it turns out good, there is an ASIC proven SoC that can be modified and recreated by anyone that doesn't want to pay an ARM or a MIPS license for a 32-bit RISC system. Also, by using a fairly cheap FPGA, a reference board with either the ASIC or the FPGA can be sold at a reasonable cost.

    25. Re:OK, I'll Say It by gratuitous_arp · · Score: 1

      This is stupid.

      Troll much?

      You're interested in what having source code can do for your business. The OpenCores community is interested in having free hardware. These are two very different interests. People who have different interests than you are not stupid. If you're old enough to talk about your business, you're old enough to grow up and realize that you don't have it all figured out.

      This is Stallmanism as its worst--"freedom" for freedom's sake without regard to functionality or practicality

      All I will say about this is it is rather shocking to hear this statement being cast in a negative light.

    26. Re:OK, I'll Say It by blair1q · · Score: 1

      Two words:

      FP
      GA

      Who needs ASIC?

    27. Re:OK, I'll Say It by blair1q · · Score: 1

      Huh. They've got TSMC 40 nm runs scheduled.

      Build the right toy, and you could compete with the bigs on that.

    28. Re:OK, I'll Say It by Anonymous Coward · · Score: 0

      Yeah . I hear that open source thing will never work either.

      Good call

    29. Re:OK, I'll Say It by Yfrwlf · · Score: 1

      They exist, they just don't make chips yet, but that is being worked on. http://www.fabathome.org/ http://www.makerbot.com/ http://www.thingiverse.com/

      --
      Promote true freedom - support standards and interoperability.
    30. Re:OK, I'll Say It by Anonymous Coward · · Score: 0

      I work for Xilinx and to get this running would require a Virtex-5 in the FXT family (or higher). These are not "cheap" FPGAs by any stretch of the imagination.

    31. Re:OK, I'll Say It by AdamHaun · · Score: 1

      I am a product engineer in the semiconductor industry, and I agree with the skeptics on this one. Open "source" PCB layouts, ROM code, etc. are great, but designing an IC is a whole different ball game. There is no way that a community-funded project fabbed on a years-old process is going to compete on cost or features with anything sold commercially. Reliability will also be an issue, especially for a high-speed design. SoCs are designed, verified, tested, and manufactured by large teams of skilled and highly-paid engineers. Where will the labor come from? Who's going to run the device qualification, and where will they get the millions of dollars' worth of hardware to do so? Who's going to write the test vectors? The OpenCores site has projects listed as "Done" with only VHDL verification! Who's going to do the difficult and tedious work of debugging real silicon? Why would volunteers (presumably engineers themselves) want to work on last decade's technology in their spare time? This isn't like an FPGA where you make your own toy to play with; they're trying to design a real product. That means lots of grunt work.

      By the way, who's supposed to buy this? They talk about undercutting the industry, but the block diagram combines a PC on a chip (PCI, DDR2, AC'97) with a microcontroller (SPI, I2C). One size fits all chips are not going to be cost competitive, especially in an older/larger process. Power will also be a concern, unless they're designing for low power on a low-power process, which takes even more money and expertise. Their "spec" describes only features, with none of the required electrical specs. What is the nominal voltage? Temperature range? Power consumption? Clock frequency?

      The OpenCores propaganda is particularly offensive:

      Please help us "revolutionize" the electronic hardware industry and to make the semiconductor giants tremble, by making a donation to design/manufacture an ASIC-component based on the world's only "true" open-source 32-bit RISC processor supporting Linux (the OpenRISC processor from OpenCores.org). We want to provide an alternative to the profit-hunting semiconductor giants who only provide "cost efficient prices" to large multi-national companies. We want to make it feasible to compete on even and fair conditions, which would be possible if we ALL contribute to create a universal OpenRISC processor ASIC component.

      Gee, I'm sorry we don't want to just give away tens of millions of dollars' worth of work. The fact that you're begging for huge piles of money from the internet just to get started ought to tell you how stupid that is.

      This whole project reads like it was created by software people who don't understand the many ways in which real hardware is different:

      * Software is a mathematical construct. It's the same everywhere. Every piece of hardware that comes out of the fab is slightly different, and runs differently at different voltages and temperatures. The illusion of digital perfection that software relies on is very hard to create. The fact that a design works in an FPGA says little about whether it will work in silicon. Some of the OpenCores IP blocks do claim to be "ASIC verified", but I can't find any characterization data.
      * Hardware can't be copied for free. It is expensive and needs even more expensive hardware to analyze. Cutting-edge software is written by random people on the internet all the time. Cutting-edge hardware development is beyond the reach of hobbyists.
      * The semiconductor industry is not crippled by stagnant monopolies. There is no Microsoft. There are lots of companies competing heavily. Look on Digikey if you want a list.
      * The semiconductor industry does not sell to consumers (except PC CPUs), but rather to engineers who are very concerned about cost, features, and reliability. It's not like software where you can easily sell people on useless flash and skimp on the basics. Development ideology is not on the radar.
      * The development environment (HDL) is not only d

      --
      Visit the
    32. Re:OK, I'll Say It by Arlet · · Score: 1

      It all depends on the application. I think this deal could be interesting for big parties, already into building their own SoC on proprietary ASICs, but not quite big enough to license an ARM core.

      For hobbyists and small time players, developing an ASIC, even together with other people, isn't really interesting. It's still very costly, and a lot of work if you want to make your own modifications or bug fixes.

    33. Re:OK, I'll Say It by Arlet · · Score: 1

      FPGAs are fine for small designs, but a nice 32 bit pipelined RISC, with a decent cache, MMU, multiple buses, and a bunch of peripherals will require an expensive FPGA to run at a reasonable speed.

      It would be smarter to go and buy a standard CPU. You can get a dual core (ARM9 + DSP) 300MHz OMAP for $30 in small quantities.

    34. Re:OK, I'll Say It by VortexCortex · · Score: 2

      This is stupid.

      Troll much?

      This is Stallmanism as its worst--"freedom" for freedom's sake without regard to functionality or practicality

      All I will say about this is it is rather shocking to hear this statement being cast in a negative light.

      I couldn't agree more. Additionally, Chip makers like Intel adding encryption capabilities to to their chips is offensive at best. Everyone knows that if an attacker has physical access, all bets are off -- even with encrypted chips... The only thing this does is prevent the end users from being able to tell what their CPU is doing.

      In no other industry do people purchase items that they can not be sure of their contents and function: Food has ingredient lists, cars have opening hoods, clothing lists fabric types, etc. Currently even closed source software plainly lists its machine instructions. This may not always be the case once CPUs have public key cryptography embedded....

      I think we need projects like these now more than ever, you can invoke "freedom" and "RMS" to imply over zealous freedom advocacy, yet I can point to current customer privacy concerns, government corruption, and major corporations with bad business practices such as "cutting off a competitor's air supply", "overselling services", and generally abusive behavior towards their own customers (lawsuits, etc).

      Clearly some people do value their freedoms more than other's.

    35. Re:OK, I'll Say It by imsabbel · · Score: 1

      I am using cyclon FPGA. They have something like 20k gates available. This has nothing to do with next generation anything, but with the fact that their cpu will be less complex than a 386...

      --
      HI O WISE PRINCE. WHT TOOK U SO DAM LONG?
    36. Re:OK, I'll Say It by imsabbel · · Score: 1

      Er... Any procress that is reasonable recent will cost a lot more for a single lithography mask...

      --
      HI O WISE PRINCE. WHT TOOK U SO DAM LONG?
    37. Re:OK, I'll Say It by mr_mischief · · Score: 1

      It's not cheaper than setting up an ASIC mask and production run? The whole idea of the FPGA is that despite the high cost per unit, if you need only a few units you don't have the huge lead-in cost.

      I didn't say "cheap" as a comparison between two different FPGAs. I said "cheap" as in total cost of a few FPGAs compared to getting an ASIC done. Buying a wagyu steak isn't cheap, but if your options for one meal are the wagyu or buying the local McDonald's franchise, it's cheaper to go with the wagyu.

      No, no car analogy, sorry.

    38. Re:OK, I'll Say It by SchwarzeReiter · · Score: 1

      However...open hardware is a fundamentally different thing. No one has chip fabs in their basement. So someone will have to pay big money to make the masks and tape-out and test the hardware. Unless some major vendor picks up the design and mass produces it lots of 100s of thousands, the price per CPU is going to be stupidly more expensive than an off-the-shelf CPU/motherboard or embedded system. And, even then, you are probably buying an overpriced, underpowered CPU just because it is "free."

      I think you are more or less right, an opportunity presents itself here: Why is it that no one has a chip fab in their basement? Aside from the obvious difficulties this is a logical milestone on the way to open hardware, and not putting serious $$$ into the pockets of manufacturers, which did not base their business on manufacturing for hobbyists, but to make custom designs for customers who want to go to market as fast as possible, and thinking about how much it costs is only secondary to them.

    39. Re:OK, I'll Say It by olof_k · · Score: 1

      The whole point of RISC CPUs is to be less complex than their CISC counterparts.

    40. Re:OK, I'll Say It by hazydave · · Score: 1

      Apple never brought "it" in-house. What they bought were the chip designers, not the fab. PA-Semi and Intrinsity are both fabless. Quite a few big semiconductor companies are: Qualcomm, Broadcom, nVidia, Marvell, SanDisk, Xilinx, Altera, etc.

      --
      -Dave Haynie
    41. Re:OK, I'll Say It by hazydave · · Score: 1

      The question I would really have: even if they can do it, after all the cost cutting and everything, is there any chance of the end result actually beating a state of the art FPGA on cost, much less an off-the-shelf micro or SOC.

      --
      -Dave Haynie
    42. Re:OK, I'll Say It by hazydave · · Score: 1

      CPUs, in particular, thrive on volume. The main reason RISC largely failed on the desktop wasn't that RISC couldn't keep up with x86, it was simply that RISC couldn't afford to keep up with x86. Intel can amortize development costs over 100M+ devices per year. And ok, sure, they charge a premium right now. So how about ARM... they come from multiple suppliers, and at least some of the cost of development is amortized over 1000M+ devices per year. I can buy a basic ARM7TDMI SOC starting at under $3.00.... and that's single quantity, on DigiKey. Ok, you need a bit more juice to run Linux, sure. An ARM Cortex A8 SOC from TI, at 800MHz, will run you as little as $27.50, again, single quantity.

      In short, there are dozens of companies making microprocessors and microcontrollers, and there's intense pressure on price. It hard to imagine this project yielding anything competitive on either price or performance. Without that, where's your market? If every FOSS enthusiast drops their x86s or whatever and buys one, all this does is slow down the rate of code development a few orders of magnitude.

      I like the idea of open source hardware based on FPGAs, from a purely hacker's appeal point of view. Not every computer needs to be used for "real work". I've attended a number of retro-computing shows, having been involved in some of the more popular computers from Pennsylvania, back before they were "classics". The folks who still hack these things do so because hacking the computer is their hobby. Not Linux, not photography or video or websurfing or CAD or anything else that makes the modern computer a tool -- the computer itself is their passion. But once the computer is just a tool, why choose a poor tool?

      I mean, sure, you could make hammers in your back yard and invite people to bring steel or lead or whatever else they had, some coal, etc. and throw hammer making parties, get out from under the repressive hardware manufacturers' thumb. But I'll probably just get mine at Sears, thanks.

      --
      -Dave Haynie
    43. Re:OK, I'll Say It by hazydave · · Score: 1

      You can't always get more. I need 100 more ... the cheapest fab I can find has a minimum run of ten 300mm wafers... you get 2500 chips per wafer, etc. And I'm the only one who needs one this year? No thanks... I'll do better buying from an actual chip company.

      The real answer is that you're safe with the open design in an FPGA, because there will always be some big evil chip company making FPGAs. Then again, they also make microcontrollers, CPUs, SOCs, etc. and aren't going to stop anytime soon. I do not believe this approach buys anyone additional security in their ability to obtain a specific micro.

      --
      -Dave Haynie
    44. Re:OK, I'll Say It by AdamHaun · · Score: 1

      Very little. Reductions in cost have mostly come from advances in process technology (aka Moore's Law) and high-volume production. A state of the art logic-only device is probably 45nm right now (32nm if you're Intel). OpenCores would probably be targeting 130nm or higher if they released today, which is three generations behind. That's a large difference in circuit density (>10x? the process naming isn't directly based on MOSFET size) and also a large difference in wafer size.

      Note also that an off-the-shelf SoC is probably going to have nonvolatile memory. The OpenCores device needs off-chip memory. Adding NVM is extremely difficult and expensive (I know because that's my day job), so there's little chance of an open hardware version. That means OpenCores isn't feature-competitive with microcontrollers. Probably they're only planning to be a PC on a chip, especially given their stated goal of running Linux. That gives it even less market appeal, and thus even less volume pricing.

      --
      Visit the
    45. Re:OK, I'll Say It by Bryan3000000 · · Score: 1

      Quite true. I overlooked that, but it's definitely relevant.

  10. Re:Nice by Anonymous Coward · · Score: 0

    "Ho;;a" is a Klingon racial epithet? Good to know, I guess...

  11. Re:Nice by Anonymous Coward · · Score: 0

    Those too are racist. Please instead use "pigmentally runaway" or "fried chickenum watermelonus".

  12. Open Source design tools? by imadork · · Score: 1

    What is the current state of Open Source ASIC Synthesis and Layout tools? It does nobody any good to have an open RTL core if you need to pay the Synopsys tax (on top of the foundry NRE) to implement it.

    1. Re:Open Source design tools? by olof_k · · Score: 1

      It is a bit thin on the ASIC side, but the simulation and development tools are picking up speed. Verilator and Icarus verilog are cool projects. Icarus can also do a bit of synthesis nowadays

    2. Re:Open Source design tools? by nurb432 · · Score: 1

      I cant remember the exact name but some 15 years ago there was a functional open project for doing die design.. Not sure if its around anymore or not...

      "sea or something" or other ...

      --
      ---- Booth was a patriot ----
    3. Re:Open Source design tools? by imadork · · Score: 1

      Seems to me you'd be better off implementing your Open-Source Hardware as FPGA's, anyway. You can get a lot of logic for a reasonable price, and the vendors are giving away the design tools for the cheap parts for free.

  13. My dream is a free SPARC T2! by cpghost · · Score: 1

    Frankly, I'd love to buy one of those SPARC T2 chips, and since their design is already released under the GPL, it would be great to have an initiative to actually build them, so we can put them in desktops and laptops. Right now, they're tucked away in Oracle / Fujitsu (super expensive!) server-only land.

    --
    cpghost at Cordula's Web.
    1. Re:My dream is a free SPARC T2! by the+linux+geek · · Score: 1, Informative

      You don't want a SPARC T2, T3, or any other recent SPARC design in your desktop or laptop. Performance of a T3 is, accoridng to SPEC, very similar to a hugely cheaper and less power-hungry AMD Magny-Cours for massive-threaded applications... and much, much worse for few-thread apps. The "high-end" Fujitsu SPARC64 VII+ is also pretty damn slow.

    2. Re:My dream is a free SPARC T2! by cpghost · · Score: 1

      Well, I actually want it for simulations, because FPops are pretty good on a SPARC, and not every workload in this area is vectorizable on a GPU via OpenCL. Furthermore, SPARC is still a vastly superior architecture w.r.t. register windows and very fast thread switching. In my experience (purely subjective, I agree), even a lowly sun4u UltraSPARC IIIcu @1.5GHz still beats most high end Intel/AMD at nearly double that frequency for most day to day applications too. My only gripe with the Ultras is, of course, the lack of multiple cores, so that compiling can be pretty slow. So I hope that a multicore T2+/T3 would be at least on par with recent x86-ers even for normal uses.

      --
      cpghost at Cordula's Web.
    3. Re:My dream is a free SPARC T2! by the+linux+geek · · Score: 1

      Floating point is not good on SPARC at this point. The T2 processors have a best-case floating-point performance of between ten and fifteen gigaflops, if I recall, and that's only if you can keep it saturated from all 64 threads. Figure that the T3 doubles that to 20-30, but again, only if you can continuously issue floating-point instructions from all 128 threads. The SPARC64 VII, the "high-performance" chips, have a theoretical performance of around 10GFLOPS per core (40GFLOPS per processor) but rarely (if I recall) achieve it.

      By comparison, Power7 is capable of 256GFLOPS per processor and 32 per core; Nehalem can do four FLOPS per cycle per core, which puts the high-end Nehalem parts around 75GFLOPS.

      A T2/T3 would not be on par with x86 for normal uses due to the annoying fact that a single thread runs at approximately 200MHz on them.

  14. Nice idea, but many pitfalls... by StandardCell · · Score: 3, Insightful

    This is a nice idea, but there are a few serious problems with it:

    1. If this doesn't catch on and people want it to continue, this could be a significant ongoing cost for running this project above and beyond allocating what people might think are one-time NRE charges. None of this appears to be detailed enough on that site so I'm not sure how far they've thought through this. Who are the target vendors, and have they tendered bids? Costs vary greatly, and I'm not at all ready to throw money when there appears not to be an "open source" plan with sufficient detail to make this real, nor with open listing of the credentials of the individuals involved. If you're gathering up to $250k for a project and you want my money, I had damned well better know that you're able to execute and that you have a real plan and definitely not just an FAQ.

    2. How did they define the product? Is it based on market needs? If so, what markets and where is the information on said markets? If it's for hobbyists, I get that, but did anyone do even a rudimentary survey to say how many timers or UARTs might be necessary, whether they should embed an MMU so you can run a more advanced OS, or what the max CPU clock speed should be? If *I* am going to put my money in it, then why not ask *me* what I want? And yeah, I know I can contribute, but how have all of those contributions been managed, organized and synthesized into what is being built AND make it sufficiently relevant for enough time that this would be worth doing before technology moves on? I don't see a single place for that around their site.

    3. Frankly, why bother when there are many other vendors such as Microchip who offer 32-bit micros with fully-documented architectures and better capabilities that you can run Linux on? I know, I know, this is what open source is about, but we're not just talking about someone's spare time on a machine they do other things with; this is a real product with real implications. I seriously don't buy how they're going to change the industry since the successful players in the industry guarantee supply to their customers.

    I know I'm going to get flamed and down-voted for this post, but the open source hardware world is much tougher than the software world, and ASIC designs are steadily dropping because ASSPs are taking their place. I think people's efforts need to be focused on software, and this is coming from a guy who's been on Slashdot more than a decade with a hardware background (and hence my name) and has switched to the software and systems world...

    1. Re:Nice idea, but many pitfalls... by olof_k · · Score: 2
      I understand your critisism, and I also would like to see a more detailed plan. Since this is a pilot project, some things will have to be worked out during the planning phase.

      1. If this doesn't catch on and people want it to continue, this could be a significant ongoing cost for running this project above and beyond allocating what people might think are one-time NRE charges. None of this appears to be detailed enough on that site so I'm not sure how far they've thought through this. Who are the target vendors, and have they tendered bids? Costs vary greatly, and I'm not at all ready to throw money when there appears not to be an "open source" plan with sufficient detail to make this real, nor with open listing of the credentials of the individuals involved. If you're gathering up to $250k for a project and you want my money, I had damned well better know that you're able to execute and that you have a real plan and definitely not just an FAQ.

      As it is stated in the FAQ, the more money donated, the smaller process opencores can afford. That will also decide the possible ASIC vendors that can be used. I'm a bit curious about what other costs than the NRE that you are thinking of

      2. How did they define the product? Is it based on market needs? If so, what markets and where is the information on said markets? If it's for hobbyists, I get that, but did anyone do even a rudimentary survey to say how many timers or UARTs might be necessary, whether they should embed an MMU so you can run a more advanced OS, or what the max CPU clock speed should be? If *I* am going to put my money in it, then why not ask *me* what I want? And yeah, I know I can contribute, but how have all of those contributions been managed, organized and synthesized into what is being built AND make it sufficiently relevant for enough time that this would be worth doing before technology moves on? I don't see a single place for that around their site.

      The OpenRISC has been used in many projects before. The IP cores that are going into the ASIC should cover most basic needs. There is also a PCI bus included to cover some additional uses. A MMU will most certainly be included, since it is targeted towards running standard Linux. The CPU speed will be limited by the process, and the current design. Still, I agree that there should be a place for these kinds of discussions. I'm guessing there will be one. For now, slashdot will have to do :)

      3. Frankly, why bother when there are many other vendors such as Microchip who offer 32-bit micros with fully-documented architectures and better capabilities that you can run Linux on? I know, I know, this is what open source is about, but we're not just talking about someone's spare time on a machine they do other things with; this is a real product with real implications. I seriously don't buy how they're going to change the industry since the successful players in the industry guarantee supply to their customers.

      I think there are a lot of use cases for this. You can buy these cheap ASICs and build a system. If you need to hardware accelerate something, then you can replace the ASIC with a FPGA and extend the design. Come to think of it, it seems kind of backwards to prototype on an ASIC and then implement it in a FPGA :)

      I know I'm going to get flamed and down-voted for this post, but the open source hardware world is much tougher than the software world, and ASIC designs are steadily dropping because ASSPs are taking their place. I think people's efforts need to be focused on software, and this is coming from a guy who's been on Slashdot more than a decade with a hardware background (and hence my name) and has switched to the software and systems world...

      I really hope that you are wrong here. Open source efforts should be able to handle as much criticism as other projects. Regarding your other point, what

    2. Re:Nice idea, but many pitfalls... by Anonymous Coward · · Score: 0

      I know I'm going to get flamed and down-voted for this post,

      tl;dr, but I'm going to mod you "redundant" just for saying this!

    3. Re:Nice idea, but many pitfalls... by Kjella · · Score: 1

      I never got the allure of open hardware. Pretty much all the benefits from open source is that you can change it easily, but you'll never be able to make individual ASICs. If you want any change you'll have submit it to some committee that'll gather up changes for a production run, potentially rejecting yours and/or accepting others you don't want. You will never be in any real control of the hardware you run.

      Many chips are extremely well documented how they function, sure they have bugs in errata lists but that's exactly because silicon bugs are expensive to fix. Also hardware is far less binary, like for example the Intel SATA bug they had - it passed all tests with the reviewers but the controller would stop working over time. What if you get a bug like that in your chip? There's no "patch and recompile" it's "throw away and buy another".

      I'm sure RMS will buy one, but I can almost guarantee that I will not. But if there are enough people like RMS out there, feel free.

      --
      Live today, because you never know what tomorrow brings
    4. Re:Nice idea, but many pitfalls... by Anonymous Coward · · Score: 0

      Another bit to consider is the patent implications. The big chip guys have been working on this sort of thing for a *VERY* long time and have a *VERY* long list of patents. HW manufactures are *REALLY* into patents it is how they protect themselves from each other and cross license things is usually the norm. Many of them are not afraid of court either. They live it and breath it.

      I am not questioning whither it could be done the 'open source' way (as it could be). I am saying the road will be a very tough one legal wise.

    5. Re:Nice idea, but many pitfalls... by VortexCortex · · Score: 2

      I never got the allure of open hardware. Pretty much all the benefits from open source is that you can change it easily, ...

      I'm sure RMS will buy one, but I can almost guarantee that I will not. But if there are enough people like RMS out there, feel free.

      Purchase Windows 9! The most secure OS line just got even more secure! W9 now implements both Intel CodeCrypt and AMD Secure Ops, giving you security from the application level all the way to the encrypted processor instructions!

      Currently, I can open up "closed source" binaries in a hex editor and see EXACTLY what it's telling my hardware to do. This may not be possible in the near future with chips that support public key encryption at the instruction level.

      Once this is possible, it's a simple matter to require licenses for any and all software development -- Its not too far fetched to imagine a law being passed that requires all software that uses the Internet or other Government controlled root-authority signed communication mediums to be licensed and encrypted / signed / tracked / etc. "Think of the children!" no? ok, then: "Only terrorists don't want security!"

      You may call folk like me paranoid and over-zealous, but it's people like me that actually get stirred up and help protect the rights of the more apathetic and/or ignorant. Don't you agree that most people don't communicate with / participate in their government enough? Who do you think picks up a bit of the slack? The over-zealous help combat the over apathetic...

      I assure you that projects like these do need to exist -- In the future, they may be the only thing that enables people like me to keep doing what we do, even if our right to do so has been eroded out from under us...

    6. Re:Nice idea, but many pitfalls... by Arlet · · Score: 1

      Once this is possible, it's a simple matter to require licenses for any and all software development

      If that ever happens, it's a simple matter to also require licenses for any and all hardware development. Therefore, whatever your fears, this project isn't going to help.

    7. Re:Nice idea, but many pitfalls... by Dhalka226 · · Score: 1

      The over-zealous help combat the over apathetic...

      Do you? Or do you alienate the middle by focusing on hypotheticals that even you acknowledge will be seen by most as paranoid and over-zealous?

      This isn't some math equation, where you registering a +20 on the GiveAShits scale balances out a couple guys with a -10 GiveAShits output. Unless there is some massive, highly funded contingent of paranoid and over-zealous types out there that I am unaware of, you can't do this by yourself. You need to reach the middle--the "apathetic"--and convince them that what you believe is what they should believe. I don't believe you can accomplish that if the typical reaction to your comments is for people to roll their eyes and walk away. And if you can't accomplish it, then no matter how much projects like this may or may not be necessary they aren't likely to be reality.

    8. Re:Nice idea, but many pitfalls... by mounthood · · Score: 1

      CPU hardware security tied to end-user software is already on the way. See Why Intel bought McAfee.

      Intel has waited for ages for its ecosystem partners to come up with ways to give consumers access to vPro's security benefits, and little has really panned out so now they're just going to take vPro (and any newer security technologies) directly to consumers via McAfee.

      --
      tomorrow who's gonna fuss
    9. Re:Nice idea, but many pitfalls... by bmajik · · Score: 1

      I think you have some nice points but I think there is another angle to look at this.

      It seems like buggy hardware continues to get made, and i know for a fact that I've bought motherboards from newegg that had component and design errors. I was SOL.

      I'm not a super gamer, i don't want to pay the final 90% of cost for the last 10% of performance.

      I'd much rather go to "openboards.com (A partner of openboards.org)" and order the latest reference MB design. I also don't mind paying a few bucks more than i would for the newegg special; I understand that for a very long time, an open competitor wouldn't have the parts and procurement volumes involved.

      I'd like to save on the IP costs, get a higher quality product, that performs a bit worse, and pay a bit more. The fact of the matter is, my time is important to me and having a known quantity of sufficient reliability matters.

      My experience has been that the after-sale support of F/OSS is better than of $Random Foreign Motherboard Maker

      The commoditization of the motherboard means that an open board design could make inroads. And there are customers like me who will trade more dollars for higher reliability/quality, but who aren't equipped to understand those price/quality tradeoffs when looking at the existing products.

      In the maker community for hardware, each part of the problem is already broken into separate companies. Group A figures out which existing ASICs are of sufficient quality and cost, and where there are gaps, produces new designs. Group B develops board layouts. Company C prints up boards, in small batches. Group D is any list of companies who will solder the components identified by A and B into the boards made by C and sell the whole thing as
      retail units.

      Group E works with group A and B to ensure that the software stack on that hardware is just magnificent. Group F comes along and makes sure that there are drivers for no-Linux OSes. Perhaps Group F even figures it what it takes to get MS to sign the drivers so that they "just work" and you can run Windows on open hardware (irony of ironies..)

      This model of distributed responsibility and an open design is similar to how "megasquirt" works, and it seems to be highly successful.

      I suspect we've all used boards that have power problems, onboard ethernet problems, ram problems, BIOS problems, etc etc. I wish I could pay $90 for a board that has the basic features I want for the current generation of stuff, and have it just work.

      I think this market is especially interesting the higher up the scale you go. A big problem i have dropping big bucks on x86 "server" equipment is that the products are low volume and don't necessarily have community support that I've come to expect.

      I think I'd much rather drop big money to buy a dual or quad socket board with 16 ram slots if i knew that 40% of kernel developers were using the same board, and that getting useful support from Dell/HP/Whomever was not part of the equation..

      We've seen this start at the software end -- first the compiler, tools, then the OS, now LinuxBIOS... we're moving towards the hardware end of things.

      --
      My opinions are my own, and do not necessarily represent those of my employer.
    10. Re:Nice idea, but many pitfalls... by Anonymous Coward · · Score: 0

      I think there is a business case for a CPU ASIC where the HDL is open source.
      A lot of smaller embedded manufacturers would use it in preference to a closed source chip because of how much easier it would be to code around the little bugs.
      Apart from the HDL, the IP needed to manufacture the chip could stay closed source, justifying investment (as opposed to charity).
      But... wouldn't a better way of doing that be to buy a generation old design outright from the likes of Philips and ARM, and then publish it's HDL?

  15. its not stupid by nurb432 · · Score: 1

    You can do this in your basement with an FPGA on a slower scale, and i am sure that if enough orders were batched we could get a chip fab in some other country to make a 'smallish run' at a more reasonable cost than your estimate.. ( no, not 'cheap' but i don't think 100's of thousands either )

    And 'free', or 'low cost' isn't the only selling point here, to me at least. 'Fully documented' and 'non-proprietary' is nothing to sneeze at.

    --
    ---- Booth was a patriot ----
  16. HDCaml by inglorion_on_the_net · · Score: 2

    Speaking of grassroots chip design, what is happening with HDCaml these days? I thought the idea was pretty neat when I first heard of it (a hardware design language that is nicer to work with than VHDL and Verilog!), but is anybody actually working with or on it? Or any other improvements on the established languages?

    --
    Please correct me if I got my facts wrong.
    1. Re:HDCaml by olof_k · · Score: 3, Informative

      Haven't heard of HDCaml before, but the idea of inventing a nicer languange than Verilog and VHDL lives on. System Verilog adds a lot of syntactic sugar and new functionality, and there is a cool project called MyHDL that uses Python. System Verilog is gaining popularity in the industry, but unfortunately there aren't any open source tools to work with it yet. The commercial ones don't seem to implement the full language either. A bit like the HTML5 situation. We could really need something though. Even after having spent nearly ten yers doing hardware design, I find the two main languages horrible to work with.

  17. Fix? by poptones · · Score: 1, Flamebait

    Too bad that, because it's an ASIC, all you can do is LOOK at that source code then try to design your code around the problem.

    I'm down with open source, but this seems fantastically stupid to me. I can buy a pretty powerful CPU from a host of manufacturers at some very good prices - less than the $25 donation they request on their page, in fact.

    We want to provide an alternative to the profit-hunting semiconductor giants who only provide "cost efficient prices" to large multi-national companies...

    This is bullshit. This is about an agenda, not about the economic reality of "competing."

    1. Re:Fix? by olof_k · · Score: 2

      But looking at the code and create workarounds that you know are working is a big step from guessing. Also, it theoretically enables you to optimize things, when you can monitor every register and clock cycle. Don't think that is very usable in reality though, but who knows. You don't need to donate $25 by the way. One dollar is fine

    2. Re:Fix? by poptones · · Score: 1

      You can no more "monitor every clock cycle" with one of these than with any other. No more do you have to "guess" than with any other. Intel and AMD have both shipped chips with WELL DOCUMENTED bugs in them. Moreover, they shipped REPLACEMENT chips in many cases. Sure sounds like a "greedy corporation" to me. Think one of these socialistic corps will be able to afford that?

    3. Re:Fix? by olof_k · · Score: 2

      Yes you can monitor every clock cycle. In a simulator, that is. Also, I'm well aware that most vendors ship good documentation, and of course, opencores can probably not afford to ship replacement chips if a bug is found after the chips have been manufactured. However, it's a known fact that we have problems with undocumented hardware on Linux. Being able to fully analyze not just the CPU, but also ethernet, PCI, USB and other peripherals should be a welcome addition for all those that are writing drivers or debugging a strange hardware behaviour. I have no comments on your last two sentences

    4. Re:Fix? by tftp · · Score: 2

      Being able to fully analyze not just the CPU, but also ethernet, PCI, USB and other peripherals should be a welcome addition for all those that are writing drivers or debugging a strange hardware behaviour.

      I did my share of that in FPGAs (Xilinx EDK) and I don't want to even hear about it. You buy a COTS MCU, solder it, and it works. You have reference designs that work, and they are done by the vendor.

      What you are talking about is a completely new can of fresh worms. Making a working ASIC is hard; if you want as few bugs as possible then it's even harder. A buggy ASIC with an open-source RTL is a disaster. Yes, you can simulate it if you are crazy enough, but it takes lots of effort, and you can't simulate an odd timing error that occurs only now and then. ModelSim is not that fast, and you need to write lots of testbenches. In the end you will invest a lot of time into this debugging, and nobody knows if you can actually find a workaround. Your competitor, who picked a closed source MCU, would be already selling his product while you are busy explaining to the management why exactly your pick of the MCU was not so good.

      In other words, there is no practical reason to select this chip over any other - unless you fear that on some unfortunate date all supplies of commercial MCUs stop. This is not possible, too much in this world depends on little 8-, 16- and 32-bit embedded systems, and you can always build your own computer out of them and run Linux on it. Your freedom of computing will be preserved, unless some laws make that, like owning a debugger, a crime.

    5. Re:Fix? by olof_k · · Score: 1

      Timing errors are always the hardest things to track down. Fortunately we are talking about a fully digital ASIC with one clock domain, except for the memory controller, and some other things I might have ignored. I recently finished a project where we converted a FPGA to an ASIC that had more than 180 clock domains. That, my friend, was hard.

      The logic bugs are mostly tracked down in simulation, and on the FPGA prototypes. Remember that the openRISC CPU has been available for some time already, runs Linux 2.6.38 fine and is being used in the industry. The RTL is mostly done except for ASICification of some parts.

      The fear of suppliers running out of MCUs is real, I can tell you. Reverse-engineering of chips, and reimplementation in FPGA happens all the time in the industry. It is expensive and time-consuming, so having the source code and constraints around is a big help.

  18. Prices by Anonymous Coward · · Score: 2, Informative

    I work for a company that produces outsourcing for ASIC supply chain. Assuming a 130nm process, we are talking about $750K for masks and the like and $250k for Non-recurring engineering. Manufacturing run requirements would be a half lot at 8 inch- 12 wafers at probably 100-150 units per wafer MINIMUM.So expect a production run of at least a thousand.

    I don't think this project can be done on commercial terms.

    1. Re:Prices by Anonymous Coward · · Score: 0

      They could go to a shared wafer service like MOSIS, which would reduce the startup costs a lot. It still doesn't make it commercially viable though.

      The whole idea doesn't really work commercially. There's also nothing at all remarkable at the ASIC being produced. In fact, in a lot of ways, it's obsolete (PCI32, DDR2, etc) before it's even taped out.

      It's also pretty obvious if you read the FAQ that this has not been particularly well thought through. For example, no specs on target process (we'll see what we can afford), no thoughts on packaging (we'll see what we can afford), no concrete plans on verification (...a lot of universities have commercial EDA tools...). The whole thing about "we want to keep pricing flat regardless of quantity" is ridiculous. In most cases, you pay not only per wafer, but also per lot. If they want to tack on to one customers "larger" order, someone is going to have to hold that extra inventory (e.g. function as a distributor). I wonder who's supposed to cough up the extra money to hold the unsold inventory.

      This not how you generally do an ASIC, this is more like how you do an open-source wankfest. While it's great that there OpenCores IP is free, a lot of it isn't what I'd call super high quality. If you don't care at all about speed, area, etc. the more simple stuff is generally OK, but it's mostly in behavioral Verilog/VHDL and leaves a lot to the synthesizer in terms of what you get quality wise.

      Bottom line is that this sounds like vented frustration on the part of little guys who have been frustrated by dealing with the realities of the semiconductor indstury. While I sympathize with some of that frustration, this type of project isn't going to change anything in the industry fundamentally and is just going to end up wasting a ton of donated money. The best possible result is that you get a feature-wise relatively crummy part that's going to be hard to get in any volume because there's no supply chain support. The likely result is that you end up with a relatively buggy, relatively overpriced (because of volume again) SoC with little to no support available. The worst case is that they screw up something major, need a mask respin, and blow the entire budget or just never raise enough to finish it.

      With that said, donors: Proceed at your own peril.

  19. MIPS by BigFootApe · · Score: 2

    While poking around a couple of weeks ago, I found a couple of HDL sources for MIPS R3000 cores. Would these run into licensing issues? They could be adapted to something similar, or perhaps other uses with the addition of on chip I/O and perhaps a vector unit, IMHO.

    1. Re:MIPS by olof_k · · Score: 2

      Not sure about MIPS, but ARM is quick to act if someone puts out ARM clones, and I guess the same principle would apply to MIPS clones, as they both are licensable. The difference is that the R3000 is from 1988 (according to wikipedia), which probably makes it less interesting

    2. Re:MIPS by Anonymous Coward · · Score: 1

      Can you give us a link for those R3000 cores, please?

    3. Re:MIPS by Adam+Hazzlebank · · Score: 2

      The original ARM designs are from 1985 (approximately). There's also an ARM OpenCore http://opencores.org/project,core_arm which I wasn't aware ARM Ltd had attempted to kill yet?

    4. Re:MIPS by Arlet · · Score: 1

      The original designs aren't very popular anymore. The oldest ARM that's still widely used is the ARM7, but some of the patents have already expired. The patent for Thumb support (6,021,265) was filed in April 14, 1997, so that hasn't expired yet. Of course, Thumb support is optional. The latest patent I can find for ARM-only, is nr 5,701,493, filed on August 3, 1995.

  20. Vaporware or pipe dream ? by slincolne · · Score: 1
    They don't appear to have an actual chip at the moment. From looking through their web site they have a design that can be downloaded to an FPGA, and a software simulator. That is a very long way from a real product.

    Why would anyone think this is a viable idea for the open source community ?

    Maybe if someone like AMD got behind it ?

    Without a long term commitment from a reliable manufacturer to supply these at a competitive rate for 5+ years there is a large risk that people investing in designs using this chip will be left high and dry. They would be far better to look at some of the ARM derivatives where at least you are not locked into a boutique supplier. The only thing that could make this a useful idea would be the availability of FPGA chips at the same price point - not holding my breath there.

    1. Re:Vaporware or pipe dream ? by Anonymous Coward · · Score: 0

      FUD... There is only a small leap from FPGA to custom silicon. I know this because the company that I work for (fewer than 50 employes) does it at least once a year. We take our software algorithm, improve and optimize it, freeze it, review and test it, convert to VHDL, software simulate it, push it to FPGA hardware, test it again, send it off to the fab house. For as long as I have been working here, the FPGA to ASIC has been the easiest step, and it's apparently inexpensive enough that we produce 10k chips, instead of just seling FPGA running our stuff.

  21. Orgasm. by unity100 · · Score: 1

    Im >.
    thank you, people.

  22. Peripherals by Anonymous Coward · · Score: 0

    No GPIO's??? Come on.

  23. May-day Alert! Grab'em by the hardware! by Anonymous Coward · · Score: 0

    (drum rolls plz) Help offset the' balance of power' for good! Help make the Open-Source-RISC-Processor possible. Grab'em by the hardware and the rest will unavoidably follow - Choose http://OpenCores.org/donation ...This is all very appropriate for May-day :) It May be the cheapest (not only in terms of $s) 'Game-Changing" stunt around for one to support, so making a donation May just yet prove to be the best investment in history ('price/performance' wise) for "The Future of Our Children", leading to the fall of the whole corrupt Intellectual-Property/Corporate/Banking/Media/State/Gov/Army/You/AndYourFamily/ThatRightMeTo/WereAllInIt system.
    Then again, it May not, but I think its worth a shot. So May May-day b the day the Slashdot Effect will make this project save us from our own greedy nature :).
    (drummer May rest now)
    May d 4s b wiz u!

  24. Thesis by Anonymous Coward · · Score: 0

    I wrote my thesis on partly the OR32 ISA way back in 2002-2003.
    The architecture is still as mildly broken as it was then.
    The OR1200 implementation is still as badly broken as then.
    For the OR32 ISA to ever become something useful the ISA needs to be updated and a non retarded implementation of the ISA needs to be done.
    To just create a new SoC is just prolonging the major pain that the OR1200 is.
    Any good ASIC/FPGA engineer can create an half useful SoC with the OR community IP blocks.
    To create a new _useful_ implementation of the OR32 ISA, needs a team, or atleast someone with brains.
    This is still not happening.
    If you want a useful CPU with a normal AMBA interface, go for the brilliant implementation of the Sparc instead (Leon series IP blocks).
     

  25. AAAHAHAHA by poptones · · Score: 1

    A little late to mod something "flamebait" when others have already shown to have found value in the conversation. Enjoy your days metamodding...

  26. Why so many negatives? Is x86 so precious? by reiisi · · Score: 1

    I mean, seriously.

    --
    Computer memory is just fancy paper, CPUs just fancy pens with fancy erasers; the 'net is just a fancy backyard fence.
  27. Lot of negative posts here. Why? by reiisi · · Score: 1

    I mean, sure, we have MIPS and ARM that are close to open and free (and some others), and SPARC is almost close to open and free. And there seems to be some sort of camp that thinks x86 is teh language of teh gods.

    But what's wrong with a cpu design that is open from the bottom up?

    (I mean, I guess it's open, they mention the GPL all over, but I have to log in to look at the design. I should go register and log in, if I can, to see if the design is worthwhile. I note they talk about the harvard split extending to the MMU and cache systems, which ought to be a good thing, but I don't notice such care taken towards the stack, which is something I'd like to see, but, then again, I know some well-knonw people have thought that was a blind alley. Guess I'll go see if I can get a login id.)

    --
    Computer memory is just fancy paper, CPUs just fancy pens with fancy erasers; the 'net is just a fancy backyard fence.
    1. Re:Lot of negative posts here. Why? by reiisi · · Score: 1

      Hmm. Verifiers on all fields.

      Username? taken/not taken, and I assume they pre-registered the 1 and two character names? Reasonable.

      e-mail address? Hmm. Takes a@b.c, so that's all good. (I'll send them an apology later.)

      First name, last name? Ai I is not valid. Yu Li is not valid. Woops.
      Numbers not valid. Eeeeeeh, well, no, that's a woops, too.
      Three letters and up on the "real" names are valid. Not good, but proceeding to next screen.

      Position. (They need this?) Acronyms must be at least two letters, apparently. Not a huge woops, but not really useful.
      City name must be three or more letters. Woops. State can be empty, but at least three letters if not empty. That's not wise, either.
      Country is from a list. erk.
      Position, city, and country all required. Woops. They seem to be collecting personal information for some reason.

      Job status not required. That's sensible.

      Projects. Source forge projects not accepted, but empty is okay. OK.
      Where did I hear about this? social networks has facebook but no slashdot.
      Click other and you get a page to itself to type in the other. "/." is not valid, but it takes it anyway.

      Dev experience, all hardware. Not entirely unreasonable, but definitely missing a bet. (Drivers?)
      Blank seems to be okay.
      But then it goes to vendor and tools and went let me proceed until I type something.
      Type "erk" in each and proceed.

      Additional info -- other expertise areas.

      Something is missing. Okay, I fixed the e-mail address to one that I own. Nope, still something missing.

      Okay, with that many errors in the sign-up process, I'll attribute the sign-up requirements to poorly de-bugged policy instead of maliciousness, at least until I find junk-mail that I can trace to them in my in box.

      Conclusion, trying to be free but not really knowing how.

      --
      Computer memory is just fancy paper, CPUs just fancy pens with fancy erasers; the 'net is just a fancy backyard fence.
  28. broken? or just not what you like? by reiisi · · Score: 1

    Specifics, please. Instructions, what they should do and don't, or what instructions are missing and why they are required in a non-broken implementation. Etc.

    Otherwise, how am I to know that you aren't just another x86 inboi mad because there is another potential competitor?

    --
    Computer memory is just fancy paper, CPUs just fancy pens with fancy erasers; the 'net is just a fancy backyard fence.
  29. no chip? by reiisi · · Score: 1

    Did you check wikipedia, or are you just saying that the chips that have been put together so far don't count for some reason?

    (There have been some non-FPGA, unless I'm mis-reading something.)

    --
    Computer memory is just fancy paper, CPUs just fancy pens with fancy erasers; the 'net is just a fancy backyard fence.
  30. donor beware? by reiisi · · Score: 1

    Isn't donating to something like this always going to be something of a gamble?

    Yeah, they're going to lose for a while.

    Hopefully, not too many casual donors will be upset that their investment in the future (as opposed to in stocks, bonds, etc.) doesn't turn into a fountain of gold for one and all by tomorrow afternoon.

    (If you want an investment in something I can guarantee will give you 10x profit tomorrow, I have some money market stuff and bundled loans for you.)

    This isn't an investment, it's a donation, non-profit encouragement for a horse that no one wants to let into the race.

    --
    Computer memory is just fancy paper, CPUs just fancy pens with fancy erasers; the 'net is just a fancy backyard fence.