TSMC To Spend $10B Building Factory for 450mm Wafers

An anonymous reader writes "With demand for processors growing and costs rising, using larger wafers for manufacturing is highly desirable, but a very expensive transition to make. TSMC just announced it has received approval from the Taiwan government to build a new factory for 450mm wafers, with the total cost of the project expected to be between $8-10 billion. The move to larger wafers isn't without its risks, though. Building new facilities to handle production is the easy part. The industry as a whole has to overcome some major technical hurdles before 450mm becomes a viable replacement for the tried and tested 300mm process. TSMC's chairman Morris Chang has stated the next five years will be filled with technical challenges, suggesting 450mm wafers may not be viable until at least 2017."

Comments

How about

[afidel]

How about they focus on fixing their 28nm production problems before they set their eyes on lowering cost through bigger wafers. It's not like many of their most lucrative clients aren't hobbled at the moment by lack of supply for their top bin parts. Oh, yes they are.

Re:How about

[Penguinisto]

Small prob with that...

Intel recently built up (still building? can't recall) a new fab here in Oregon. It'll cost them $1bn or so, all said and done. Dropping that many ducats at a time gets expensive after awhile, even for a beast as big as Intel. Meanwhile, they still have a fab going that was originally built in the 1980's (the Aloha facility, if you're curious), and after they're done running whatever iteration they have passing through it now, it'll be useless as a fab (the walls are basically swiss cheese by now with all the holes punched and patched through them to accommodate new processes, new chip types, new machinery, etc).

Personally, I'm kind of curious how a 450mm wafer is going to do them much good.

Having worked in the solar industry (growing crystal is the same process as semiconductors for mono PV wafers), the CZ process used to grow monocrystal wafers eats a lot of time, and you can only get so much weight hanging off the "seed" (starter crystal) before it breaks. There's also the fact that as diameter increases, the need for more precise control over rotational speed during the grow increases (the thing spins at a precise speed, slowly pulling the cylindrical crystal out of a molten vat). I guess what I'm getting at is, sure they can have something at 450mm with enough precision and effort, but the resulting crystal would also have to be shorter overall, if only to keep the weight from snapping the seed crystal (causing the thing to splash back into the vat, tearing the crucible up, making a mess, and oh yeah - ruining the multi-hour run).

Long story short, they can likely (with a lot of effort, not to mention newer/bigger machinery) get bigger-diameter crystals, but because the seed can only be so big, the wafer yield will likely drop significantly.

Re:How about

[ibsteve2u]

but the resulting crystal would also have to be shorter overall, if only to keep the weight from snapping the seed crystal (causing the thing to splash back into the vat, tearing the crucible up, making a mess, and oh yeah - ruining the multi-hour run)

No problem; Taiwan small island, less gravity. Care to invest?

Re:How about

[Anonymous Coward]

Just don't install Linux on it, you won't be able to return it if it's defective.

never go full retard

Re:How about

[tlhIngan]

It's not like many of their most lucrative clients aren't hobbled at the moment by lack of supply for their top bin parts. Oh, yes they are.

Hence the move to 450mm wafers.

In semiconductor manufacturing, the cost of the wafer is basically the entire cost - around $1000 each. After processing, it's a bit more expensive. From this they cut it all up and package.

But two important factors are size of the final die, and the yield. The larger the die, the less per wafer you can make so they cost more. The yield has the same thing - the more bad chips per wafer, the more expensive it becomes because the good chips have to pay for the bad. And there's a relation between size and yield - the larger the chip, the greater the chance that it'll be bad as flaws in the silicon or manufacturing are amplified by the die area.

So a larger wafer means more chips per wafer, which gives you hopefully less cost per chip (the wafer doesn't cost that much more over the number you get).

Chips get cheaper for two reasons - enhanced yields (as processes get refined) and moving to smaller nodes (each chip consumes less die area and thus you can fit more per wafer).

For chips that are fixed-area, like say a full-frame dSLR sensor - it can mean cheaper cameras as yields get higher.

For larger die chips, like the largest FPGAs (which can easily cost $15,000+ each) it can bring down their cost. And memory is die-area-limited, so larger wafers mean they can be bigger as well.

Re:How about

[Savantissimo]

Bigger wafers means less waste around the edges where the rectangular chips meet the circular wafer edge. This becomes very important for larger chips such as image sensors. (Not sure if the new process will be used for that, though.) Also, many manufacturing steps are applied to the wafer as a whole, and having wafers with over 2.25 times as many chips makes those steps cheaper on a per-chip basis. Making the boules will be hard, but I think they will find some way of providing extra support for the boule as it grows. Thinner wafers may also get more out of each boule. There will be many other problems such as maintaining alignment over the greater distance which may be harder.

Fuck Everything

[oldhack]

We're doing 500mm!

Re:How about getting the units right?

[Kjella]

I'm sorry, but you're the one making a fool of yourself. The process is 28 nanometers, the wafers are now 300 millimeters wide and will be 450.

Re:No wonder

[Jeng]

That doesn't explain the fondness for Ramen Noodles.

Re:Taiwan's where it's at

[Yvan256]

Sounds to me like they're kicking ass over there.

It's not like they have a choice. The government outlawed chewing gum.

Re:Larger wafers or larger lithographies/processes

[cheese_boy]

I can understand if TSMC, or anyone else, were moving from 8" to 12" wafers.
This is going to 18" wafers. (~17.7 inch - close enough that I'd assume it'd be called "18 inch")
300mm wafer are sometimes called 12" wafers. And is what many/most use now.
If someone were moving from 8" to 12" (200mm to 300mm) it's not news at this point - they're years behind others in moving.

Re:I know next to nothing about wafer fabs, but...

[MarioMax]

Being that I work in Intel's Fab 32, I can speak on authority on this.

Smaller lithography means you need much better process control and tighter control limits. Machines that can produce quality die for a 45nm lithography might not get the job done at 32nm, and machines that work at 32nm lithography might not work for 22nm, at least not without some serious upgrades to your existing machines, process controls, etc. It is not a trivial task to perform a die shrink, even without architecture changes.

Also changing wafer sizes (from 300mm wafers to 450mm wafers) DOES require new buildings, or complete retrofits of your existing buildings. It is not a trivial task to convert a fab from one wafer size to another; you practically need to rebuild your fab starting from scratch. Nevermind the need to completely retool your fab (virtually all existing 300mm tools will not support 450mm wafers).

Fab wise?

[Sycraft-fu]

It is big, but then so is the US and more cutting edge research is going on here. Intel is already on the 22nm node, and I don't mean playing with, I mean shipping chips in mass quantities to retailers and OEMs (Ivy Bridge). TSMC is on the 28nm half node currently, with plans to go to the 20nm half node about the time Intel goes to the 14nm half node.

In terms of 450mm wafers, well Intel is going there too or at least that is the plan. Fab 42 is under construction in Chandler Arizona right now and will be 14nm process, 450mm wafer. It is slated to start commercial production in 2013, and Intel has been pretty damn good about hitting its dates on fabs.

No doubt Taiwan is big for semiconductor fabrication, as TSMC is one of the biggest fab-for-hire outfits out there. However if you think all the R&D is going on there, all it means is you've not paid attention to Intel. They are ahead of all other processes currently (and usually are) and they upgrade at a fantastic rate. They do real ground breaking research too, and have to as they are usually leading the pack. One cool thing they have in their latest process is multi-gate transistors, which is a first for CPUs as far as I know.