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High-Performance Monolithic Graphene Transistors Created
MrSeb writes "Hardly a day goes by without a top-level research group announcing some kind of graphene-related breakthrough, but this one's a biggy: Researchers at the University of Erlangen-Nuremberg, Germany have created high-performance monolithic graphene transistors using a simple lithographic etching process. This could be the missing step that finally paves the way to post-silicon electronics. In theory, according to early demos from the likes of IBM and UCLA, graphene transistors should be capable of switching at speeds between 100GHz and a few terahertz. The problem is, graphene doesn't have a bandgap — it isn't a natural semiconductor, like silicon — and so it is proving very hard to build transistors out of the stuff. Until now! The researchers say that current performance "corresponds well with textbook predictions for the cutoff frequency of a metal-semiconductor field-effect transistor," but they also point out that very simple changes could increase performance 'by a factor of ~30.'"
I read the article (I know it's not considered good form here on Slashdot), and there seems to be a discrepancy: this is described as being a graphene transistor, but the gate uses silicon carbide as the semiconductor. So it seems like a better description would be a hybrid graphene/semiconductor transistor. Is this correct?
If it is a hybrid then what are the limitations and how is it better then current all semiconductor circuits? As far as I know (not very much) there is no reason to build silicon carbide integrated circuits, so why would anyone want to use SIC with graphene? Is this a step to something more useful?
I'm not trolling, I just want to get a better understanding.
Yes. They have only used graphene for the gates and contacts, not the channel itself, so a hybrid graphene/SiC transistor would probably be a better description.
As for advantages over existing technology: as far as I know the switching speed is dependent on the channel material, NOT the gate etc. So these transistors will (afaik) be no faster than a normal SiC transistor. All the hyperbole about graphene transistors being is only in the linked news article and not in the paper. In fact the final conclusion of the paper is:
The concept's particular strength, however, lies in the following property: within the same processing steps, many epitaxial graphene transistors can be connected by graphene strip lines along with graphene resistors and graphene/SiC Schottky diodes, and therefore complex circuits can be built up. As a special feature of graphene in contrast to semiconductors, we anticipate that even a complete logic is feasible.
On the other hand this is still interesting for other reasons:
1) They have demonstrated large scale integration of graphene. If we can get a bandgap in graphene without sacrificing too much mobility then combined with this kind of work we have a complete graphene chip.
2) Another thing they emphasise in the paper is the simplicity of the lithography process. Simpler lithography means it's easier to go smaller. Smaller features = better chips.
TL;DR - the news article is bullshit, the real result is interesting but not revolutionary (yet).
http://compsoc.man.ac.uk/~shep/
Firstly, why is graphene "faster". This is mainly due to the large mobility of electrons and holes in the material. Furthermore, (I'm not sure here) the fact that the channel is only 1 atom thick, means that switching the transistor from one state to the other should be very fast.
With graphene, the problem is the lack of a band gap. This means that there is always a current flowing through the device no matter which state it's in (on or off, corresponding to 1 or 0). This is a major drawback if you want to make digital transistors out of them, because the device will always draw power no matter what. Ideally you would want the device to have zero or close to zero current flowing through it in one state and have current flow in the other state. So in order to make a power efficient "digital" transistor from graphene you would need to somehow induce a band gap in the material. There are various ways to do this but none have provided the "breakthrough" the summary mentions.
In some cases graphene transistors could be used, for example analog devices, where the above mentioned issues are not problems. This is the case of the 100 GHz transistors that the article mentions.
The issue of dissipating heat should be quite different in the case of graphene, because of the materials very good heat transport properties.
Log tables were needed for more precision. Slide rules usually would go only to 4 digit, while a good table could put you up to 7 digits, though carrying around that 200 pages was a bit cumbersome. Plus your tables often had sine,cos and other functions.
Now I feel old.
To avoid clock skew, you regenerate the clock. You can use a phase locked loop to sync to another clock, and generate a new clock signal synced with this clock but with an adjustment to the phase.
The FPGA that I use has methods for dealing with clock skew, the Xilinx app note describes how you can deal with it:
http://www.xilinx.com/support/documentation/application_notes/xapp462.pdf ...see from page 26 "Clock skew, the performance thief" and "Make it go away!"
Presumably when an ASIC has a similar problem, a similar approach is taken. (Disclaimer: I have zero experience with ASICs).
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