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World's Most Powerful x86 Supercomputer Boots Up in Germany
Nerval's Lobster writes "Europe's most powerful supercomputer — and the fourth most powerful in the world — has been officially inaugurated. The SuperMUC, ranked fourth in the June TOP500 supercomputing listing, contains 147,456 cores using Intel Xeon 2.7-GHz, 8-core E5-2680 chips. IBM, which built the supercomputer, stated in a recent press release that the supercomputer actually includes more than 155,000 processor cores. It is located at the Leibniz-Rechenzentrum (Leibniz Supercomputing Centre) in Garching, Germany, near Munich. According to the TOP500 list, the SuperMUC is the world's most powerful X86-based supercomputer. The Department of Energy's 'Sequoia' supercomputer at the Lawrence Livermore National Laboratory in Livermore, Calif., the world's [overall] most powerful, relies on 16-core, 1.6-GHz POWER BQC chips."
My fatass almost got excited for a second.. a supercomputer fueled by BBQ... :(
If you were me, you'd be good lookin'. - six string samurai
Or check tpyos.
...so I can first post mote quickly!
let's fix you're spelling frist, then work on the spead of you're posting.
coding is life
powerful and x86 are oxymorons. Try the i860 architecture now THAT's a processor, it's ancient I know.
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I need to find myself some of these Power BBQ Chips mentioned in the summary. Fast and tangy without the downside of Cheetoh fingers.
But the real question is, can it run bitcoin mining software? See, you thought I was going to say Linux or Crysis, didn't you? lol.
;-)
P.S. most miners are run on Linux btw
...so I can first post mote quickly!
let's fix you're spelling frist, then work on the spead of you're posting.
You head two many correctly sppeled wurds you must be a bot.
Damn_registrars has no butt-hole. Damn_registrars has no use for a butt-hole.
1) Does it run Linux?
2) I for one, would like to welcome our new register constrained overlord.
3) Can you imagine a Beowulf cluster of these?
4) In Soviet Russia supercomputer run YOU!
5) There is no God, I reject your fairytales.
This sig is not paradoxical or ironic.
> actually includes more than 155,000 processor cores
Scientists and engineers toyed with putting Windows 8 on it, but Windows 8 with 150,000-200,000 core support was over $73 trillion.
(-1: Post disagrees with my already-settled worldview) is not a valid mod option.
We're number four!!
We're number four!!
We're number four!!
This signature is false.
I'm glad they didn't use Cyrix CPUs.
Don't mix up addressing and computing.
The whole internet would fit in a 64 bit address space, there is really absolutely no need at all for more than 64 bit for addresses in CPUs, that's why x86_64 and other 64 bit archs are here to stay, and you'll probably never see "128 bit" processors at all.
On the other side, today's x86_64 CPUs are capable of 128 bit (SSE) and 256 bit (AVX) computing. The width of the compute units is also bound to increase for some time, with Intel already planning to go 1024 bit in the not-so-far future.
I think we're going to be stuck in the same ghz range until we're past silicon.
That's what I remember being told, anyway...
Even when we get past "silicon", there are some fundamental issues that will likely constrain clock-speeds things until we solve them.
First, the design of small low power devices (e.g, switching transistors) is currently problematic. Minimum sized geometries tend to "leak" more power, and potential subsitutes for silicon that are faster also tend to have leakier transistors (like graphene). We can make the devices bigger to minimize this, but then they switch slower, and there is more distance to traverse between devices. This is problematic in that the perf per watt tradeoff isn't great if you are doubling the watts to get 50% more perf (as an example), sometimes it doesn't make sense to go so fast.
Second, we are reaching manufacturability limits. Today, one of the biggest problems with silicon is parametric yield loss. This is basically device-to-device variation of circuit parameters due to manufacturing variation. This requires quite a bit of over-engineering of margin which reduces the ability to use any of the intrinsic speed advances. We are now using nearly every trick in the book to get small devices that lay down stuff where you can count the dimensions of some features in atoms on your fingers and toes, so parametric yield loss due to + or - one atom dimension average change causing a 5-10% variation isn't likely to go way very soon.
Third, re-syncronization uncertainty is now a big problem and getting worse. If a re-synchronizer circuit (say one that harmonizes two sides of an asynchronous fifo across 2 clock domains running at the same nominal frequency) is designed so that it would only fail 1-in-a-million times, you could have a reasonable failure-rate by cascading a few of them. If you are running 10 or 100 times faster, that's not a scalable strategy. Nowdays, even the jitter from a phase-locked and delay-locked loops or from two slightly mismatched clock-trees on different parts of a chip can be several clock periods long so what used to be a fairly simple syncrhonization problem now would likely be 10-100 times harder if it was 10-100 times faster (jitter isn't improving as fast as the potential clock rate).
Of course if we stop using electrons in lattices for computational circuits (e.g., use photons in crystals), and developed new structured circuit realization technologies that allowed reducing some of the engineering margins required to yield devices, some of these limitations might be solved in different ways, but those types of advances are probably quite far off... I'm willing to wager, that we will start to leverage alternate computation technologies (e.g., like ubiquitous parallel operation, or even quantum) before we get there, so maybe going so fast won't seem as critical as it does today...