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IBM Reports Carbon Nanotube Chip Breakthrough

First time accepted submitter yawaramin writes "IBM has apparently made a breakthrough in arranging carbon nanotubes into the logic gates necessary to make a chip. This should help miniaturize and speed up processors beyond what today's silicon-based technologies are capable of. The article notes though that perfecting the carbon nanotube technology could take up the rest of this decade."

5 of 73 comments (clear)

  1. How refreshing by scdeimos · · Score: 4, Informative

    Most stories I see say that [insert favourite research here] will be ready for commercial production within five years. Finally, somebody's being honest and saying it won't be ready before the end of this decade.

  2. URL for the IBM research paper and press release by aheath · · Score: 5, Informative

    The IBM research paper is available at http://www.nature.com/nnano/journal/vaop/ncurrent/full/nnano.2012.189.html The paper is protected by a paywall.

    The IBM press release is available at http://www-03.ibm.com/press/us/en/pressrelease/39250.wss

    I recommend reading the comments on the New York Times article. My favorite comment so far is:

    MC - NYC
    The Singularity edges closer...

  3. Re:URL for the IBM research paper and press releas by Anonymous Coward · · Score: 4, Informative

    article text:
    Carbon nanotubes have potential in the development of high-
    speed and power-efficient logic applications1–7. However, for
    such technologies to be viable, a high density of semiconduct-
    ing nanotubes must be placed at precise locations on a sub-
    strate. Here, we show that ion-exchange chemistry can be
    used to fabricate arrays of individually positioned carbon nano-
    tubes with a density as high as 1 3 109cm22—two orders of
    magnitude higher than previous reports8,9. With this approach,
    we assembled a high density of carbon-nanotube transistors in
    a conventional semiconductor fabrication line and then electri-
    cally tested more than 10,000 devices in a single chip. The
    ability to characterize such large distributions of nanotube
    devices is crucial for analysing transistor performance, yield
    and semiconducting nanotube purity.
    The precise placement of carbon nanotubes on a substrate typi-
    cally involves one of three techniques: the direct growth of nano-
    tubes on a substrate10,11, the transfer of nanotubes from a ‘growth’
    substrate to a device substrate5,6, or the deposition of nanotubes
    from solution onto a device substrate8,9,12–18. Because nanotubes
    can be metallic or semiconducting, a further consideration for
    high-performance digital logic is the degree to which metallic nano-
    tubes can be eliminated. Although approaches for enriching sub-
    strate-supported semiconducting nanotubes during or after
    synthesis have been demonstrated19,20, currently the most effective
    techniques involve processing the nanotubes in solution21.
    One promising approach for placing solution-based nanotubes is
    to selectively position them on a specific substrate by chemically
    functionalizing the nanotubes or the substrate14–18. This typically
    involves using a patterned surface (such as SiO2/HfO2) such that
    nanotubes deposited from solution adhere only to one part of the
    pattern (the HfO2, for example). Key metrics for determining
    the efficacy of the deposition are the density of individually
    placed nanotubes, which must exceed 1 × 1010cm22, with a pitch
    smaller than 10 nm for high-performance logic6,7, and the selectiv-
    ity, which is the degree to which adsorption takes place only on the
    pattern of interest. In general, however, solution-based approaches
    that result in high density exhibit poor selectivity14,16, and those
    that offer high selectivity have low density17,18.
    We have developed a selective placement method based on ion
    exchange between a functional surface monolayer and surfactant-
    wrapped carbon nanotubes in aqueous solution. Strong electrostatic
    interaction between the surface monolayer and the nanotube surfac-
    tant leads to the placement of individual nanotubes with excellent
    selectivity and a density of 1 × 109cm22. Furthermore, the
    approach is compatible with the most efficient solution-based sep-
    aration schemes21, allowing wafer-scale integration using highly
    purified carbon nanotubes.
    Our nanotube placement using an ion-exchange technique
    is illustrated in Fig. 1a. The surface monolayer is formed from
    4-(N-hydroxycarboxamido)-1-methylpyridinium iodide (NMPI)
    molecules, which were synthesized from commercially available
    methyl isonicotinate (see Methods). The monolayer contains a
    hydroxamic acid end group that is known to self-assemble on
    metal oxide surfaces, but not on SiO2(refs17,18,22). We selectively
    self-assembled NMPI on HfO2regions of a patterned SiO2/HfO2
    surface. The functionalized surface was then placed in an aqueous
    solution of carbon nanotubes. Solubility of the nanotubes was
    achieved using an anionic surfactant (sodium dodecyl sulphate,
    SDS). Excess surfactant in the solution was removed by dialysis.
    The anion of NMPI (that is, iodide) is exchanged with the
    anionic surfactant wrapped around the nanotubes, leading to a
    strong coulombic attraction between the negatively ch

  4. Re:citation? by Dupple · · Score: 4, Informative

    There's some info here on Nature but it's pay walled

    http://www.nature.com/nnano/journal/vaop/ncurrent/full/nnano.2012.189.html

    There's some additional info in a pdf from the same site here

    http://www.nature.com/nnano/journal/vaop/ncurrent/extref/nnano.2012.189-s1.pdf

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  5. Ars Technica by tsa · · Score: 5, Informative

    Ars also has a piece on this, here.

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    -- Cheers!