Slashdot Mirror
The Mile Markers of Moore's Law Are Meaningless
szotz writes "Keeping up the pace of Moore's Law is hard, but you wouldn't know it from the way chipmakers name their technology. The semiconductor industry's names for chip generations (Intel's 22nm, TSMC's 28nm, etc) have very little to do with actual physical sizes, says IEEE Spectrum. And the disconnect is only getting bigger. For the first time, the "pay us to make your chip" foundries are offering a new process (with a smaller-sounding name) that will produce chips that are no denser than their forbears. The move is not a popular one."
If TSMC isn't keeping up with Moore's Law, that's not a problem with Moore's Law. It's a problem with TSMC.
Now if it also applied to Samsung, Hynix, IM Flash, and Toshiba-Sandisk, then it would be cause for concern.
You mean to tell me that a casual observation made about 40 years ago doesn't really mean anything in the real world? Let along be a "law"?
Man, that's some deep shit right there. We're talking Hindu guru kinds of deep. The Buddha would have been amazed.
Is that some archaic form of measurement used by a backwards nation somewhere?
-- Tigger warning: This post may contain tiggers! --
And thirdly, More's law is more what you'd call "guidelines" than actual rules.
"File to fit, pound to insert, paint to match" - Aircraft Maintenance 101
Moore's Law isn't even a law... it's a prediction. Didn't we already agree that predictions are only useful to talking heads, pundits and hucksters?
Anyone who actually works in the semiconductor industry could've told you this. (Ever notice how the GHz stopped growing a while ago? The move to multi-core happened around the same time and even that's stopped growing.) Yes, it's still possible to shrink transistors further but the speed and power reduction gains are diminishing and the costs of further shrinking are moving from merely eye-popping to astronomical.
Intel can afford to stay ahead of everyone else a bit (this is one of the primary reasons AMD is having difficulty staying alive) because of the huge volume that they have but even they're having problems.
all are antiquated.
Surely you jest!
This is sad, for EE. This rapid decline / stop of Moore's law has been the case for the last few years, and clearly its not getting better.
Overall innovation in EE has slowed down tremendously, since the mid 2000's. Most of the innovation has been 'mined out', and new innovation is mostly done at the system level where they integrate different components (digital, analog, architecture) together for unique applications (usually ultra low power related).
Unfortunately, its also why I believe the field of opportunity has mostly shifted full-way to CS. In terms of an art analogy, the canvas technology (EE) is pretty much set, and the drawing (CS) is where it's at. Sad but true.
The rising salaries and benefits in CS, compared to EE, does not help the EE industry. Furthermore, the tremendous overlap in skillsets (EE who are near the middle of the stack) means EE can jump easily into CS, meaning the industry will hemorhage good talent due to incompetitive wages.
/ a disillusioned EE
That way, you'd have the option of scrolling back to less dense chip designs.
If intel has to resort to this then know Moore's law is in a very bad spot.
Moore's Law: Every discussion of Moore's Law must start with an argument about what Moore's Law means.
Changing the names to make something sound better has been a strat for decades, if not longer.
So why is this a surprise that the semiconductors are using it now to sell stuff.
Be seeing you...
You've got it switched...
see, when the data does not support the hypothesis, you **change the hypothesis** not how you interpret the data
Moore's Law has never been a 'law'...it was a cool statistical novelty that seemed to predict processor advancements...it is NOT and HAS NEVER BEEN fit to predict anything invovling money or resources...it's 'for fun'
I've seen Singularity/Kurzweil types in TED talks show some dumb graph of 'Moore's Law' and show how, according to the law, humans will have the processor speed to do XYZ by 2050....it's all bunk...
Using Moore's Law to make important decisions is about like using a Slashdot Poll to do the same...I don't trust people professionally who take a concept like Moore's Law and build their understanding of an industry around it. It's a common mistake of perception.
Maybe there is some sort of pattern to processor speed, but it's not helping us understand anything to be so reductive and irresponsible with how we use scientific concepts.
Thank you Dave Raggett
Intel is the King of liars. In going FinFET (Intel's biggest manufacturing disaster to date) , the 2D, top-down profile of Intel's transistor diminishes, meaning that Intel should have got a large density (transistors per mm2) boost from this fact alone. However, AMD's latest GPU, the 290X is VASTLY more dense (without FinFETs) at TSMC's 28nm process than ANY part (pure memory chips excluded) Intel makes at its so-called 22nm process (with FinFETs).
In other words, it is an absolute LIE to state that Intel currently has a process advantage. Intel does have an advantage of having a MUCH faster mains-powered x86 architecture than AMD, and using much less power (again on mains-powered systems only) to achieve this. Sadly, these two advantages are becoming ever less important in the market-place. No-one cares about power-usage on high-end mains-powered PCs, and very few people indeed need the performance of the top Intel parts, especially since almost everything once done on the CPU is now processed on the GPU or dedicated hardware blocks. Worse, now games are finally supporting multiple CPU cores properly, AMD's AAA gaming performance on its much cheaper 6-core parts matches Intel's gaming performance on its TWICE as expensive 4-core parts.
Moving from Intel's cheating, technology like FD-SOI makes the rush (the very, very, very expensive rush) to FinFET look extremely premature. FD-SOI can give better results on current generation fabrication plants than FinFET on next-gen ones, at the tiniest fraction of the cost. The industry was predicated on a shrink every couple of years, but now it is clear that finding new materials and geometries for semiconductor elements on current sizes makes far better sense.
What FinFET promised in theory, it completely failed to deliver in practise for Intel, and Intel has tried twice, totally revamping its FinFET designs from the Ivybridge to the Haswell with no luck (hotter chips that clock less well and only offer real power saving at the useless 'mains-powered' part of the power curve). For those of you dumb enough to have been fooled by Intel's Haswell propaganda, let me EXPLAIN this fact. Haswell only APPEARS to use less power because Intel has optimised power consumption when the chip is doing nothing, or almost nothing. So, on a tablet, when browsing, Haswell effectively switches itself off when you are reading a mostly unchanging web-page. On the other hand, when Haswell is doing actual processing, it is no more power efficient than the last couple of generations of Intel designs, and often uses more power (this is mobile we are talking about here).
In the near future, all fabs (including Intel and TSMC) are describing the minimum 2D geometric features of their FinFET transistors as the 'process'. So, Intel's new parts next year claim 14nm (or is that 16?) and yet AMD and TSMC are also claiming to offer 20nm AND 14nm next year as well (the size discrepancies like 32nm from Intel vs 28nm from TSMC are already down to so-called half-nodes that describe the minimum features of the smallest transistors, rather than the inherent geometry of the process itself).
Anyway, Intel is claiming a new process shrink in 2014, and its competitors are claiming TWO (which is a bit of a clue about the cheating), bringing them 'equal' in process with Intel for the first time in very many years. This means informed people will IGNORE the so-called process, and focus on die size, transistor density per mm2, power dissipation per mm2, and clock speed.
hey thanks for the response
Right, so did you just use Moore's Law or did you look at other factors as well?
What I mean by other factors:
> Trends of the capacity of other recent products? Did you look at teh speeds of CMOS processes from that company over the last 10 years and extrapolate?
> Did you talk to a sales rep or engineer or product development manager at the CMOS process company and **ASK THEM** how fast their upcomming models would be (approximately)
> Do literature review of what academic research groups and possible FOSS (idk if it applies for you) were doing in that CMOS wireless type transciever tech? My former university, Ball State University did research for WiMax coverage and speed for Cisco (before WiMax was ditched)...did you look at any of that to predict the CMOS process capability you needed?
I'm trying to be polite, but I call BS.
If you claim your company made that decision based **soley** on math from Moore's Law....well I have a hard time believe that claim's veracity. You are either fabricating or that company is not very wise. And if you company **did** use other factors, then that kind of invalidates your point and parenthetically supportsy my point...I won't deny that using it **might** have added value, but only IF you also did common practices like I mentioned above...
Seriously...did you use other factors besides Moore's Law?
Like asking the vendor? (or any of the others mentioned above)
Thank you Dave Raggett
Even if we did, there are not enough electrons in these lines to make the "law of large numbers" work. So this time we are bumping against a real barrier.
Anyway, there are not any mass market killer apps based on computation anymore. All the action is in connectivity and bandwidth enhancement. Given the computer market has been split into makers vs takers (or content produces vs content consumers) this is changing the funding models. Earlier the large number of passive consumers buying computers way more powerful computationally than what the typical consumer needs, was subsidizing the cost of computers for the few who actually need that much of computational power. Now the passive consumers are buying simpler devices needing less computation and more connectivity. We can expect coders like us can expect our hardware to get more expensive, like the old line of unix workstations like micro-vaxes or sun-solaris or hp-ux or SG-Iris.
sed -e 's/Chuck Norris/Rajnikant/g' joke > fact
All sub-65nm and most 65nm processes are lithographically exposed in water current for the reason you stated. The next step is extreme UV or even e-beam lithography but it's expensive and very, very difficult.
You're quite right that this is an economic/mass-market issue more than a pure technical issue.
thnx again...
so, go up a few branches and you'll find your original comment...it **didn't mention other factors** and, most importantly, you said that the success was **due to using Moore's Law**
indep. of each other, fine, but you used pretty flowery language to describe the pressures of your decision and cited **only** Moore's Law for your making the right choice...here's one example:
but throughout you only attributed your success to Moores Law...
Other commenter here on this branch is right...we don't need to dance around the issue...Moore's Law is an interesting novelty and that's all...nothing wrong with running the numbers on it for comparison sake (b/c others in the industry use it if nothing else!)
Thank you Dave Raggett
Heat is a big cpu problem. Have they tried rotating the active core on the fly? When core 0 gets too hot, they switch it off (under single core workload of course) and move activity to core 1. When that gets too hot, I type a bunch more, or you get the picture.
I come here for the love
http://electronicdesign.com/digital-ics/tiny-transistors-giant-molecules-moore-s-law-crashes-laws-physics
Give this a read.
Moore's law extrapolations are hitting the limitations of physics.
As for shrinking transistors?
Pretty meaningless, silicon hit the limitations of the interconnects a while back.
Parasitic capacitance has been the brick wall that people can not get past.
www.effectiveelectrons.com "chips that work" Analog, RF, Mixed Signal
Scaling may be reaching limits, but there are still gains to be had. Think T-RAM, Z-RAM, memristors, etc. There are a number of technologies that will not only scale smaller, but also have smaller structures at the same node. Using better memory technologies alone has the potential to save considerable die space. 6T-SRAM, DRAM, and Flash leave much to be desired. The question is, why do the superior technologies never seem to make it out of the lab?
At some point, we need to stop beating the nearly dead horse with incremental improvements to antiquated technologies.
If you've ever actually had to do precision pacing and measured it out, you'd know why a pace is 2 steps. It equalizes the difference between left and right. 1% accuracy in pace length over a moderately long distance (50-500 m) isn't unusual.
As somebody who works in Lithography, I can let you know that they have not been using visible light for a long time. All fine resolution lithography is designed around as close to a monochromatic light source as possible. Having a significant spread in the light spectrum was just not consistent to do much below the 1.0 um feature size. This is because of the diffraction spread is very dependent on the wavelength and the fact that the photons have different energies thus reacting differently (or not at all) in the photoresist on the wafer.
Thus broadband lithography gave way to g-line (465nm visible blue) which gave way to i-line (365nm Ultra-Violet); Next was deep UV (248nm), Now 193nm is still used in state of the art systems today with lots of tricks such as immersion (where the light goes into water before it hits the wafer to increase the NA of the system) and double patterning (splitting up the image into multiple images that are combined in the etch processes after). Extreme UV is 13.5nm light is the next step but it is a very difficult light source to work with and the systems outrageous sums of money even for this industry.
What you are completely correct about is the importance of connectivity. I went from working in a dying 1xx nm CMOS fab this year to a thriving 1.0+um fab that makes wireless components. The lithographic part of the process (and just cramming more and more transistors on a die) is not the key value to our customers; its the exotic materials that we use to target more and more bands of wireless connectivity. I expect there will always be a demand in the market for more and faster transistors for pure computation. Its unfortunately no longer where the market growth is; thus the ROI on developing these technologies is looking more and more risky for businesses. What I have found interesting is that just about everybody working on the high end of the industry is pretty confident that the transistors will work at the 5nm-7nm node so there is still an incentive to head in that direction for now. After that will require some radical re-thinking about the materials used in computational machines.
The ultimate limit is the placement of individual atoms. It's already been done, but the process is agonizingly slow.
Contribute to civilization: ari.aynrand.org/donate
If you were doing more than thinking in tiresome categories you might have called it a self-fulfilling projection which is pretty much exactly what it became.
To refine this even more precisely, it's an ex post self-fulfilling projection, where "ex post" modifies "self-fulfilling".
But wait, there's more! It's a virtuous ex post self-fulfilling projection, where "virtuous" modifies "self-fulfilling projection".
We're now deep into The Remains of the Day. I might even call it a pink leather virtuous ex post self-fulfilling projection. Sailed through menopause without a hiccup—to everyone's great surprise—but even lathering on a hair-net bale of Grecian Formula teaser treats the glory days are well behind us.
It seems to me that the next thing to really boost computer performance is optical interconnect.
With optical interconnect, parasitic capacitance and RC delays are just gone, and associated power consumption radically reduced.
I know that there are various parties working on optical interconnect and even optical transistor equivalents.
I don't mean to imply that achieving optical interconnect (or optical transistor equivalents) will be easy, I'm just saying that it has promise to remove many of the current performance limits.
--PM
Battling for the title of who has the smallest one.
EUV got fucked by the industry's choice of light source ... all the money went down the drain into the plasma based sources and now they feel pot committed. Neither EUV nor direct write e-beam is going anywhere fast, expect the industry to muddle on for at least half a decade with 193 nm light (assuming the global economy manages to muddle on for that long).
With all the money pumped in the plasma EUV light sources and money lost due to delayed access to those sources the industry could have just build FEL laser sources it needed (ridiculously expensive, but more of a known quantity R&D wise).
Moore's law has been superseded by Koomey's law:
the number of computations per joule of energy dissipated has been doubling approximately every 1.6 years.
Koomey's law seems to hold well.