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CERN Engineer Details AMD Zen Processor Confirming 32 Core Implementation, SMT (hothardware.com)
MojoKid writes: AMD is long overdue for a major architecture update, though one is coming later this year. Featuring the codename "Zen," AMD's already provided a few details, such as that it will be built using a 14nm FinFET process. In time, AMD will reveal all there is to know about Zen, but we now have a few additional details to share thanks to a computer engineer at CERN. CERN engineer Liviu Valsan recently gave a presentation on technology and market trends for the data center. At around 2 minutes into the discussion, he brought up AMD's Zen architecture with a slide that contained some previously undisclosed details. One of the more interesting revelations was that upcoming x86 processors based on Zen will feature up to 32 physical cores. To achieve a 32-core design, Valsan says AMD will use two 16-core CPUs on a single die with a next-generation interconnect. It has also been previously reported that Zen will offer up to a 40 percent improvement in IPC compared to its current processors as well as symmetric multithreading or SMT akin to Intel HyperThreading. In a 32-core implementation this would result in 64 logical threads of processing.
So is this actually going to catch up to Intel? It'd be great to have meaningful competition in the CPU space again....
Cemil.
Just 90% there at 50% cheaper. I'm 100% happy with my A10 5800K for way cheaper of what it would have cost me to go with Intel. Late 2016 the year of AMD.
by TheSpoom (715771) Uncaring Linux user here. I have nothing to add to this but please continue. *munches popcorn*
They'll do research and try and raise clock speeds, but the amount of heat required and the amount of cooling required is proportional to the square of the clock speed. The faster you try and change the state of something (electric charge), the more heat is generated. They might be able to switch to optical computing then the heat problem goes away. Maybe they'll get more efficient CPU's with fewer transistors and more parallelization.
But, it's far simpler to just add more cores as transistor sizes shrink by a half every year or two. That's guaranteed.
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That's guaranteed.
Surely you weren't saying sizes shrink by half every two years is guaranteed. Intel is already saying they won't be able to reach the process shrink goal in 2 years this time around. Around 5nm the shrink will turn into a research project just as challenging as the clock frequency issue. You can't pack carbon atoms closer than ~0.2nm nevermind features. A small protein molecule is 3nm in diameter. A significant drought of Moore's law is coming.
They could simply go back to the larger die areas we had only 10 years ago. It just means performance won't be "free" as time goes on. If you want a better chip you need a bigger chip and it'll cost more because you get less out of a wafer. There's plenty of fucking room on ATX boards and micro ATX boards and even mini ITX boards. And if you want to stick with tiny footprints like the Intel NUCs or the Google/Amazon/Intel "stick it in your HDMI port" shits, you can stack vertically or incorporate your RAM into the die.
I have a suspicion AMD will produce a part with HBM 2 incorporated into the APU die, resulting in a product that is literally a system on a chip, and finally realizes the shit they've been harping on about with regards to HSA. The GPU and the CPU have buckets of memory and all live together holding hands, sharing resources, talking to each other openly, helping each other build a deck or patch some drywall or whatever else the program asks them to do. Mayb we'll see something at E3 2017.