Slashdot Mirror
ARM Announces Next-Gen 64-Bit Artemis Mobile Chip On 10nm TSMC FinFET Process (hothardware.com)
MojoKid writes from a report via Hot Hardware: ARM has been working closely with TSMC for years now. Over the last six years or so especially, ARM and TSMC have collaborated to ensure that TSMC's cutting-edge process technologies work well with ARM's processor IP. However recently, ARM just announced the successful tape-out of a test chip featuring next-generation, 64-Bit ARM v8-A mobile processor cores, codenamed Artemis, manufactured using TSMC's upcoming 10nm FinFET process technology. The test chip features what ARM calls an Artemis cluster. It's essentially a quad-core processor with power management IP, a single-shader Mali graphics core, AMBA AXI interconnect, and test ROMs connected to a second cluster by an asynchronous bridge that features the memory subsystem, which is stacked with a Cortex M core that handles control logic, some timers, SRAM, and external IO. Compared to 16nm FinFET+, at nominal voltage, the 10nm test chip offered a 12% performance improvement in a similar power envelope. In super-overdrive mode (Vsod), the Artemis test chip offered similar performance, but at 30% lower power.SoCs for premium mobile devices with next-generation cores produced on the 10nm process node are expected to arrive later in the second half of this year.
If it's true that TSMC can do volume at 10 nm then it really is a watershed. Intel is struggling to do volume at 10 nm http://www.theinquirer.net/inquirer/news/2447789/intel-denies-further-delays-to-10nm-chips-beyond-2017
It would be a watershed because Intel has been ahead in process node technology for decades. If it looses it's edge on the node then its a huge event.
I'm skeptical that TSMC can really crank out volume at 10 nm beating Intel which apparently can't. Volume is the difference between a science project that produces one usable chip in one hundred and reliable mass production of millions of chips.
Has the ARM world really beaten the x86 world in process lithography?
If it's true that TSMC can do volume at 10 nm then it really is a watershed. Intel is struggling to do volume at 10 nm
We'll see. As far as I know, Intel doesn't announce test tapeouts since they're not in the business of selling design and process tech but rather actual processors. But if you look at slides from their 14nm release you see PRQ = product release qualification = volume production was late Q2 2014 and there's yield graphs back to May 2013. Considering Intel was on a two-year tick-tock I would think it's natural if their first test was mid-2015 and Kaby Lake was announced in July because the yields were way too low.
A full 300mm wafer is 70695 mm^2, a Skylake quad is 122mm^2 and at 10nm you're probably looking at ~1000 CPUs/wafer. So with 0,1% yield you can issue the PR release saying you've made a 10nm chip, but if you don't have consistency in the process it's not worth launching because the net result costs more than a mature 14nm process. In any case parity is pretty good too, being a half-node behind is fighting with a cost handicap that's really tough to beat as AMD has noticed. When they launch Zen/Polaris it's the first time in forever they're on roughly even footing with Intel.
Live today, because you never know what tomorrow brings